KR920018939A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR920018939A
KR920018939A KR1019920003660A KR920003660A KR920018939A KR 920018939 A KR920018939 A KR 920018939A KR 1019920003660 A KR1019920003660 A KR 1019920003660A KR 920003660 A KR920003660 A KR 920003660A KR 920018939 A KR920018939 A KR 920018939A
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South Korea
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metal
electrode
forming
dielectric film
manufacturing
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KR1019920003660A
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KR100215338B1 (ko
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마사유키 스스키
료오 하루타
히로시 신리키
마사유키 나카타
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가나이 쓰토무
가부시키가이샤 히타치 세이사쿠쇼
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/117Oxidation, selective

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

내용 없음

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예 1의 반도체장치의 요부단면도,
제2도는 상기 반도체장치를 제조공정 마다에 나타내는 요부단면도,
제3도는 상기 반도체장치를 제조공정 마다에 나타내는 요부단면도.

Claims (19)

  1. a) 반도체기판 위에 제1 및 제2의 금속을 구성되는 제1의 전극을 형성하는 단게와; b) 상기 제1의 전극상에 상기 제1의 금속의 산화막으로 된 유전체막을 적충하 시키는 단계와; c) 상기 유전체막과 상기 제1의 전극을 산화시키는 단계와; d) 상기 유전체막 위에 제2의 전극을 형성하는 단계로 구성되는 반도체장치 제조 방법.
  2. 제1항에 있어서, 상기 제1의 금속은 IVa 또는 Va 족에 속하는 금속이고, 상기 제2의 금속은 몰리브덴(Mo)과 텅스텐(W)으로 구성되는 그룹으로부터 선택된 금속인 것을 특징으로 하는 반도체장치 제조 방법.
  3. 제2항에 있어서, 상기 산화는 H2O와 H2를 포함하는 기체안에서 이행되어 지는 것을 특징으로 하는 반도체장치 제조 방법.
  4. 제2항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 텅스텐(W)인 것을 특징으로 하는 반도체장치의 제조 방법.
  5. 제4항에 있어서, 상기 제1의 금속의 함유량은 50atm%인 것을 특징으로 하는 반도체장치의 제조 방법.
  6. 제2항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 몰리브텐(Mo)인 것을 특징으로 하는 반도체장치의 제조 방법.
  7. a) 반도체기판 위에 제1과 제2의 금속으로 구성된 제1의 전극을 형성하는 단계와; b) H2O와 H2를 포함하는 기체안에서 상기 제1의 전극을 산화함으로써 상기 제1의 금속의 산화막인 유전체막을 형성하는 단계와; c) 상기 유전체막 위에 제2의 전극을 형성하는 단계로 구성되는 바도체 제조 방법.
  8. 제7항에 있어서, 상기 제1의 금속은 IVa 혹은 Va족에 속하는 금속이고, 상기 제2의 금속을 몰리브덴(Mo)과 텅스텐(W)으로 구성되는 그룹으로 부터 선택된 금속인 것을 특징으로 하는 반도체 제조 방법.
  9. 제8항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 텅스텐(W)인 것을 특징으로 하는 반도체 제조 방법.
  10. 제8항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 몰리브덴(Mo)인 것을 특징으로 하는 제2의 반도체 제조 방법.
  11. a) 반도체 기판의 표면위에 소스, 드레인, 게이트 전극을 가지는 MISFET을 형성하는 단계와; b) 제1의 금속과 제2의 금속으로 만들어지고, 상기 MISFET의 소오스와 드레인 중에 하나와 전기적으로 연결되는 제1전극을 형성하는 단계와, c) 상기 제1의 전극위에 상기 제1의 금속의 산화막을 형성하는 유전체막을 적층시키는 단계와; d) 상기 유전체막 상에 제1의 전극을 산화하는 단계와; e) 상기 유전체막상에 제2전극을 형성하는 단계로 구성된 반도체 제조방법.
  12. 제11항에 있어서, 상기 제1의 금속은 IVa 혹은 Va족에 속하는 금속이고, 상기 제2의 금속은 몰리브덴(Mo)와 텅스텐(W)을 구성하는 그룹으로 부터 선택된 금속인 것을 특징으로 하는 반도체장치 제조 방법.
  13. 제12항에 있어서, 산화는 H2O와 H2를 포함하는 기체안에서 이행하는 것을 특징으로 하는 반도체장치 제조방법.
  14. 제12항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 텅스텐(W)인 것을 특징으로 하는 반도체 제조 방법.
  15. 제14항에 있어서, 상기 제1의 금속은 함유량은 50atm%를 특징으로 하는 반도체장치 제조 방법.
  16. 제12항에 있어서, 상기 제1의 금속은 탄탈(Ta)이고, 상기 제2의 금속은 몰리브덴(Mo)인 것을 특징으로 하는 반도체 제조 방법.
  17. 제12항에 있어서, 상기 제1의 전극과 상기 소스와 드레인 중 하나 사이에 시리콘 하측막을 형성하는 단게를 더 구비한 것을 특징으로 하는 반도체 제조 방법.
  18. 제17항에 있어서, 상기 하층막과 제1의 전극 사이에 산화저항성 도전막의 장벽층을 형성하는 단계를 더 구비하는 것을 특징으로 하는 반도체 제조 방법.
  19. 제17항에 있어서, 상기 배리어층은 TIN, TI-W합금, TiSi2NiSi 및 CoSi2로 이루어진 그룹으로 부터 임의로 선택되는 것을 특징으로 하는 반도체 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920003660A 1991-03-06 1992-03-05 반도체 장치의 제조방법 KR100215338B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP91-038837 1991-03-06
JP3883791 1991-03-06
JP91-322735 1991-12-06
JP32273591A JP3149231B2 (ja) 1991-03-06 1991-12-06 半導体装置の製造方法

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KR920018939A true KR920018939A (ko) 1992-10-22
KR100215338B1 KR100215338B1 (ko) 1999-08-16

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