KR920013644A - 웨이퍼 묘화장치 - Google Patents

웨이퍼 묘화장치 Download PDF

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Publication number
KR920013644A
KR920013644A KR1019910022971A KR910022971A KR920013644A KR 920013644 A KR920013644 A KR 920013644A KR 1019910022971 A KR1019910022971 A KR 1019910022971A KR 910022971 A KR910022971 A KR 910022971A KR 920013644 A KR920013644 A KR 920013644A
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KR
South Korea
Prior art keywords
wafer
arrangement method
selecting
center
writing device
Prior art date
Application number
KR1019910022971A
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English (en)
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KR950003892B1 (ko
Inventor
하츠오 나카무라
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR920013644A publication Critical patent/KR920013644A/ko
Application granted granted Critical
Publication of KR950003892B1 publication Critical patent/KR950003892B1/ko

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

내용 없음

Description

웨이퍼 묘화장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 배열방법의 일예를 나타낸 웨이퍼의 평면도, 제2도는 본 발명에 다른 배열방법의 다른 예를 나타낸 웨이퍼의 평면도, 제3도는 본 발명에 따른 배열방법의 또 다른 예를 나타낸 웨이퍼의 병면도, 제4도는 본 발명의 1실시예에 따른 웨이퍼 묘화장치를 나타낸 블럭도, 제5도는 칩 사이즈와 칩 그로스(chip gross)의 오차의 관계를 나타낸 도면, 제6도는 본 발명에 따른 배열방법의 다른 예를 나타낸 웨이퍼의 평면도.

Claims (2)

  1. 쇼트배열의 중심으로 되는 기본쇼트의 위치를 웨이퍼의 중심에 대해 조금씩 이동시켜 각 배열방법에서의 칩 그로스 또는 쇼트 그로스로 산출하고, 이들 배열방법중 웨이퍼당 쇼트수가 가장 적으면서 웨이퍼당 칩 그로스가 최대로 되는 소정의 배열방법을 선택하는 제1수단(30)과, 상기 소정의 배열방법에 따라 레티클상에 묘화된패턴을 웨이퍼상에 묘화하는 제2수단(211, 212, ......)을 구비하여 구성된 것을 특징으로 하는 웨이퍼 묘화장치.
  2. 제1항에 있어서, 상기 제1수단(30)은 상기 웨이퍼의 주변부에 형성되는 결함영역과 상기 웨이퍼의 정보영역을 제외한 웨이퍼면냉서 웨이퍼 당 쇼트수가 가장 적으면서 웨이퍼당 칩 그로스가 최대로 되는 소정의 배열방법을 선택하는 것을 특징으로 하는 웨이퍼 묘화장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910022971A 1990-12-19 1991-12-14 웨이퍼 묘화장치 KR950003892B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-403792 1990-12-19
JP2403792A JP2577507B2 (ja) 1990-12-19 1990-12-19 ウェーハの描画装置

Publications (2)

Publication Number Publication Date
KR920013644A true KR920013644A (ko) 1992-07-29
KR950003892B1 KR950003892B1 (ko) 1995-04-20

Family

ID=18513522

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910022971A KR950003892B1 (ko) 1990-12-19 1991-12-14 웨이퍼 묘화장치

Country Status (5)

Country Link
US (1) US5305222A (ko)
EP (1) EP0491375B1 (ko)
JP (1) JP2577507B2 (ko)
KR (1) KR950003892B1 (ko)
DE (1) DE69131682T2 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100219699B1 (ko) * 1995-10-30 1999-09-01 손욱 음극선관

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3336649B2 (ja) * 1992-12-25 2002-10-21 株式会社ニコン 露光装置、露光方法、及びその露光方法を含むデバイス製造方法、及びそのデバイス製造方法により製造されたデバイス
JPH07211622A (ja) * 1994-01-27 1995-08-11 Nikon Corp 露光方法及び露光システム
JP3058245B2 (ja) * 1995-01-27 2000-07-04 キヤノン株式会社 投影露光装置及び半導体製造方法
US5699260A (en) * 1995-03-14 1997-12-16 Analog Devices, Incorporated Technique for optimizing the number of IC chips obtainable from a wafer
JP3320262B2 (ja) * 1995-07-07 2002-09-03 キヤノン株式会社 走査露光装置及び方法並びにそれを用いたデバイス製造方法
DE19537756A1 (de) * 1995-10-10 1997-04-17 Itt Ind Gmbh Deutsche Verfahren zum Optimieren einer Stepfeldanordnung auf einem Halbleiterwafer
JPH09190971A (ja) * 1995-10-10 1997-07-22 Deutsche Itt Ind Gmbh 半導体ウエハにおけるチップパタンの最適化方法
US6021267A (en) * 1997-09-08 2000-02-01 International Business Machines Corporation Aspect ratio program for optimizing semiconductor chip shape
US6604233B1 (en) 1999-06-28 2003-08-05 Texas Instruments Incorporated Method for optimizing the integrated circuit chip size for efficient manufacturing
US6374398B1 (en) * 1999-12-28 2002-04-16 Vlsi Technology, Inc. Efficient database for die-per-wafer computations
US6522940B1 (en) * 1999-12-28 2003-02-18 Koninklijke Philips Electronics N.V. Method and system for varying die shape to increase wafer productivity
US6529790B1 (en) * 1999-12-28 2003-03-04 Koninklijke Philips Electronics N.V. Computation of die-per-wafer considering production technology and wafer size
US6980917B2 (en) * 2002-12-30 2005-12-27 Lsi Logic Corporation Optimization of die yield in a silicon wafer “sweet spot”
US7243325B2 (en) * 2004-07-21 2007-07-10 Bae Systems Information And Electronic Systems Integration Inc. Method and apparatus for generating a wafer map
US7353077B2 (en) * 2005-07-29 2008-04-01 Taiwan Semiconductor Manufacturing Company Methods for optimizing die placement
DE102007030051B4 (de) * 2007-06-29 2018-05-30 Globalfoundries Inc. Waferlayout-Optimierungsverfahren und System
CN112446887B (zh) * 2019-09-05 2022-04-08 长鑫存储技术有限公司 晶圆切割晶片数计算方法及计算设备
EP3992715B1 (en) * 2020-09-09 2023-05-31 Changxin Memory Technologies, Inc. Wafer chip layout calculation method, medium and apparatus
CN114239467A (zh) * 2020-09-09 2022-03-25 长鑫存储技术有限公司 晶圆的晶片布局计算方法、装置、介质与设备

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* Cited by examiner, † Cited by third party
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JPS58107633A (ja) * 1981-12-21 1983-06-27 Canon Inc 特殊チツプを逃げたシヨツト配列方法
JPS59101831A (ja) * 1982-12-01 1984-06-12 Canon Inc 半導体焼付露光装置
US4734746A (en) * 1985-06-24 1988-03-29 Nippon Kogaku K. K. Exposure method and system for photolithography

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100219699B1 (ko) * 1995-10-30 1999-09-01 손욱 음극선관

Also Published As

Publication number Publication date
DE69131682D1 (de) 1999-11-11
EP0491375A2 (en) 1992-06-24
EP0491375A3 (en) 1992-10-28
JPH04218908A (ja) 1992-08-10
KR950003892B1 (ko) 1995-04-20
JP2577507B2 (ja) 1997-02-05
EP0491375B1 (en) 1999-10-06
US5305222A (en) 1994-04-19
DE69131682T2 (de) 2000-03-09

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