KR910008842A - 레벨 변환기의 속도제어 회로 - Google Patents
레벨 변환기의 속도제어 회로 Download PDFInfo
- Publication number
- KR910008842A KR910008842A KR1019890015443A KR890015443A KR910008842A KR 910008842 A KR910008842 A KR 910008842A KR 1019890015443 A KR1019890015443 A KR 1019890015443A KR 890015443 A KR890015443 A KR 890015443A KR 910008842 A KR910008842 A KR 910008842A
- Authority
- KR
- South Korea
- Prior art keywords
- speed control
- control circuit
- terminal
- constant voltage
- transistor
- Prior art date
Links
- 238000010586 diagram Methods 0.000 description 2
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Logic Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 2 도는 본 발명의 레벨 변환기를 나타낸 회로도.
제 3 도 종래의 레벨 변환기를 동작과 본 발명의 레벨 변환기의 동작을 비교하여 설명하기 위한 타이밍도이다.
Claims (4)
- 제어신호에 의하여 제어되는 PMOS 트랜지스터와 NMOS트랜지스터의 각 드레인단자 사이에 TTL 신호를 입력으로하는 PMOS 트랜지스터와 NMOS트랜지스터로 구성된 CMOS트랜지스터와 상기 CMOS 트랜지스터의 출력단자에 연결 구성된 노아게이트의 레벨변환기에 있어서, TTL입력신호에 따라 온/오프되는 스위칭수단과, 상기 스위칭수단의 출력단자에 정전압을 설정하기위한 정전압 수단과, 상기 스위칭수단이 온-오프와 정전압 수단의 정전압에 의하여 속도가 제어되는 속도제어수단과, 로 연결된 레벨변환기의 속도제어회로.
- 제 1 항에 있어서, 스위칭수단은 입력단자에 PMOS트랜지스터의 게이트단자를 연결하고, 상기 PMOS트랜지스터의 드레인단자와 소오스단자를 연결하여 구성된 레벨변환기의 속도제어회로.
- 제 1 항에 있어서, 정전압 수단은, 정전원(Vcc)가 NMOS트랜지스터의 게이트와 드레인에 인가되도록 연결하고, 상기 NMOS 트랜지스터의 소오스단자에 저항을 연결하여 구성된 레벨변환기의 속도제어회로.
- 제 1 항에 있어서, 속도제어수단은, 스위칭수단의 온-오프와 정전압 수단의 정전압에 의하여 온-오프되는 PMOS 트랜지스터로 구성된 레벨변환기의 속도 제어회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890015443A KR920006251B1 (ko) | 1989-10-26 | 1989-10-26 | 레벨변환기 |
FR909002441A FR2653951B1 (fr) | 1989-10-26 | 1990-02-27 | Convertisseur de niveau. |
GB9004352A GB2238681B (en) | 1989-10-26 | 1990-02-27 | A level converter |
JP2047084A JPH03147419A (ja) | 1989-10-26 | 1990-02-27 | レベル変換器 |
DE4006144A DE4006144A1 (de) | 1989-10-26 | 1990-02-27 | Pegelumsetzer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019890015443A KR920006251B1 (ko) | 1989-10-26 | 1989-10-26 | 레벨변환기 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910008842A true KR910008842A (ko) | 1991-05-31 |
KR920006251B1 KR920006251B1 (ko) | 1992-08-01 |
Family
ID=19291059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890015443A KR920006251B1 (ko) | 1989-10-26 | 1989-10-26 | 레벨변환기 |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH03147419A (ko) |
KR (1) | KR920006251B1 (ko) |
DE (1) | DE4006144A1 (ko) |
FR (1) | FR2653951B1 (ko) |
GB (1) | GB2238681B (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4127212A1 (de) * | 1991-08-16 | 1993-02-18 | Licentia Gmbh | Schaltungsanordnung zur pegelumsetzung |
KR940005509B1 (ko) * | 1992-02-14 | 1994-06-20 | 삼성전자 주식회사 | 승압단속회로및이를구비하는출력버퍼회로 |
JP3038094B2 (ja) * | 1992-12-24 | 2000-05-08 | 三菱電機株式会社 | 半導体集積回路装置の出力回路 |
DE102007005403A1 (de) | 2007-02-03 | 2008-08-07 | Man Roland Druckmaschinen Ag | Trennsaugereinrichtung für eine Bogendruckmaschine |
DE202010003265U1 (de) | 2010-03-08 | 2010-05-27 | Manroland Ag | Saugerkopf |
DE202011001879U1 (de) | 2010-12-16 | 2011-03-24 | Manroland Ag | Saugereinrichtung |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4258272A (en) * | 1979-03-19 | 1981-03-24 | National Semiconductor Corporation | TTL to CMOS input buffer circuit |
JPS5873233A (ja) * | 1981-10-28 | 1983-05-02 | Nec Corp | 半導体集積回路 |
JPS58184821A (ja) * | 1982-03-31 | 1983-10-28 | Fujitsu Ltd | 昇圧回路 |
US4501978A (en) * | 1982-11-24 | 1985-02-26 | Rca Corporation | Level shift interface circuit |
JPS6162230A (ja) * | 1984-09-04 | 1986-03-31 | Seiko Epson Corp | インタ−フエ−ス回路 |
US4593212A (en) * | 1984-12-28 | 1986-06-03 | Motorola, Inc. | TTL to CMOS input buffer |
JPS61170125A (ja) * | 1985-01-23 | 1986-07-31 | Oki Electric Ind Co Ltd | 出力回路 |
JPS6213120A (ja) * | 1985-07-10 | 1987-01-21 | Mitsubishi Electric Corp | 半導体装置 |
JPS6269719A (ja) * | 1985-09-24 | 1987-03-31 | Toshiba Corp | レベル変換論理回路 |
US4689505A (en) * | 1986-11-13 | 1987-08-25 | Microelectronics And Computer Technology Corporation | High speed bootstrapped CMOS driver |
-
1989
- 1989-10-26 KR KR1019890015443A patent/KR920006251B1/ko not_active IP Right Cessation
-
1990
- 1990-02-27 GB GB9004352A patent/GB2238681B/en not_active Expired - Fee Related
- 1990-02-27 DE DE4006144A patent/DE4006144A1/de active Granted
- 1990-02-27 JP JP2047084A patent/JPH03147419A/ja active Pending
- 1990-02-27 FR FR909002441A patent/FR2653951B1/fr not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE4006144C2 (ko) | 1992-03-05 |
KR920006251B1 (ko) | 1992-08-01 |
JPH03147419A (ja) | 1991-06-24 |
FR2653951A1 (fr) | 1991-05-03 |
FR2653951B1 (fr) | 1992-02-14 |
GB2238681A (en) | 1991-06-05 |
GB9004352D0 (en) | 1990-04-25 |
GB2238681B (en) | 1994-03-23 |
DE4006144A1 (de) | 1991-05-23 |
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