KR940004963A - 최대치회로 - Google Patents
최대치회로 Download PDFInfo
- Publication number
- KR940004963A KR940004963A KR1019930016679A KR930016679A KR940004963A KR 940004963 A KR940004963 A KR 940004963A KR 1019930016679 A KR1019930016679 A KR 1019930016679A KR 930016679 A KR930016679 A KR 930016679A KR 940004963 A KR940004963 A KR 940004963A
- Authority
- KR
- South Korea
- Prior art keywords
- maximum value
- nmos
- value circuit
- connects
- source
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0038—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude)
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
본 발명은 소형이고 또한 고속인 최대치회로를 제공하는 것을 목적으로 한다.
본 발명의 최대치회로는, 복수의 nMOS의 드레인을 전원에 접속함과 아울러, 소오스를 고저항 통해 접지하고, 각 nMOS의 게이트에 입력전압을 접속하며, 각 nMOS의 소오스에 출력단자를 접속한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관한 최대치회로의 1실시예를 나타내는 회로도.
Claims (1)
- 복수의 nMOS (T1)(T2)(T3)의 드케인을 전원 (Vcc)에 접속함과 아울러, 소오스를 고정항(R)을 통해 접지하고, 각 nMOS(T1)(T2)(T7)의 게이트에 입력전압(x) (y) (z)을 접속하며, 각 nMOS (T1)(T2)(T3)외 소오스에 출력단자를 접속하고 있는 최대치회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4252048A JPH0676090A (ja) | 1992-08-26 | 1992-08-26 | 最大値回路 |
JP92-252048 | 1992-08-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940004963A true KR940004963A (ko) | 1994-03-16 |
Family
ID=17231848
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930016679A KR940004963A (ko) | 1992-08-26 | 1993-08-26 | 최대치회로 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5467030A (ko) |
EP (1) | EP0584402A1 (ko) |
JP (1) | JPH0676090A (ko) |
KR (1) | KR940004963A (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996010753A1 (en) * | 1994-09-30 | 1996-04-11 | Philips Electronics N.V. | Extreme level circuit |
FR2728744B1 (fr) * | 1994-12-21 | 1997-03-14 | Sgs Thomson Microelectronics | Circuit de fourniture de tension extremum |
FR2728745B1 (fr) * | 1995-06-09 | 1997-03-21 | Sgs Thomson Microelectronics | Circuit de fourniture de tension extremum |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5644218A (en) * | 1979-09-20 | 1981-04-23 | Nec Corp | Electronic circuit using field effect transistor |
JPS60173924A (ja) * | 1984-02-20 | 1985-09-07 | Toshiba Corp | 論理回路 |
US4613772A (en) * | 1984-04-11 | 1986-09-23 | Harris Corporation | Current compensation for logic gates |
JPS6234416A (ja) * | 1985-08-07 | 1987-02-14 | Victor Co Of Japan Ltd | 信号選択回路 |
JPS6234417A (ja) * | 1985-08-07 | 1987-02-14 | Victor Co Of Japan Ltd | 信号選択回路 |
JPH01265718A (ja) * | 1988-04-18 | 1989-10-23 | Toshiba Corp | シュミットトリガ回路 |
US4896059A (en) * | 1988-07-26 | 1990-01-23 | Microelectronics Center Of North Carolina | Circuit to perform variable threshold logic |
JPH02221870A (ja) * | 1989-02-22 | 1990-09-04 | Toshiba Corp | 最大値検出回路及び最小値検出回路 |
JPH03291571A (ja) * | 1990-04-09 | 1991-12-20 | Toshiba Corp | 最大値出力回路及び最小値出力回路 |
JP3178716B2 (ja) * | 1990-09-04 | 2001-06-25 | キヤノン株式会社 | 最大値出力回路及び最小値出力回路並びに最大値最小値出力回路 |
-
1992
- 1992-08-26 JP JP4252048A patent/JPH0676090A/ja active Pending
- 1992-12-11 EP EP92121189A patent/EP0584402A1/en not_active Withdrawn
-
1993
- 1993-08-26 KR KR1019930016679A patent/KR940004963A/ko not_active Application Discontinuation
-
1994
- 1994-10-12 US US08/322,408 patent/US5467030A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0676090A (ja) | 1994-03-18 |
US5467030A (en) | 1995-11-14 |
EP0584402A1 (en) | 1994-03-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
N231 | Notification of change of applicant | ||
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |