KR910000792B1 - 반도체기판의 제조방법 - Google Patents

반도체기판의 제조방법 Download PDF

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Publication number
KR910000792B1
KR910000792B1 KR1019860009433A KR860009433A KR910000792B1 KR 910000792 B1 KR910000792 B1 KR 910000792B1 KR 1019860009433 A KR1019860009433 A KR 1019860009433A KR 860009433 A KR860009433 A KR 860009433A KR 910000792 B1 KR910000792 B1 KR 910000792B1
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KR
South Korea
Prior art keywords
semiconductor wafer
semiconductor
wafer assembly
manufacturing
assemblies
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019860009433A
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English (en)
Korean (ko)
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KR870006623A (ko
Inventor
다케히코 노무라
요시노리 나츠메
요시노리 호소키
Original Assignee
가부시키가이샤 도시바
와타리 스기이치로
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 도시바, 와타리 스기이치로 filed Critical 가부시키가이샤 도시바
Publication of KR870006623A publication Critical patent/KR870006623A/ko
Application granted granted Critical
Publication of KR910000792B1 publication Critical patent/KR910000792B1/ko
Expired legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065—Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062—Prior to assembly
    • Y10T156/1064—Partial cutting [e.g., grooving or incising]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Recrystallisation Techniques (AREA)
KR1019860009433A 1985-12-27 1986-11-08 반도체기판의 제조방법 Expired KR910000792B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60292577A JPS62154614A (ja) 1985-12-27 1985-12-27 接合型半導体基板の製造方法
JP60-292577 1985-12-27

Publications (2)

Publication Number Publication Date
KR870006623A KR870006623A (ko) 1987-07-13
KR910000792B1 true KR910000792B1 (ko) 1991-02-08

Family

ID=17783570

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860009433A Expired KR910000792B1 (ko) 1985-12-27 1986-11-08 반도체기판의 제조방법

Country Status (5)

Country Link
US (1) US5087307A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
EP (1) EP0226772B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS62154614A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR910000792B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3684676D1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2685819B2 (ja) * 1988-03-31 1997-12-03 株式会社東芝 誘電体分離半導体基板とその製造方法
US5076021A (en) * 1989-04-28 1991-12-31 Silicon Technology Corporation Flat grind stage assembly for an automatic edge grinder
US5201977A (en) * 1989-08-09 1993-04-13 Hiroaki Aoshima Process for producing structures from synthetic single-crystal pieces
JPH0719737B2 (ja) * 1990-02-28 1995-03-06 信越半導体株式会社 Ｓ０１基板の製造方法
DE69127582T2 (de) * 1990-05-18 1998-03-26 Fujitsu Ltd Verfahren zur Herstellung eines Halbleitersubstrates und Verfahren zur Herstellung einer Halbleiteranordnung unter Verwendung dieses Substrates
JPH05259016A (ja) * 1992-03-12 1993-10-08 Mitsubishi Electric Corp ウエハ作製用基板及び半導体ウエハの製造方法
JPH06229356A (ja) * 1993-02-05 1994-08-16 Shoichiro Yamazaki 回転体を利用する動力蓄積装置
US5595522A (en) * 1994-01-04 1997-01-21 Texas Instruments Incorporated Semiconductor wafer edge polishing system and method
KR0170182B1 (ko) * 1994-11-29 1999-03-20 양승택 측면접합을 이용한 대면적 평판 디스플레이 제조방법
US6113721A (en) * 1995-01-03 2000-09-05 Motorola, Inc. Method of bonding a semiconductor wafer
US5674110A (en) * 1995-05-08 1997-10-07 Onix S.R.L. Machine and a process for sizing and squaring slabs of materials such as a glass, stone and marble, ceramic tile and the like
JPH09290358A (ja) * 1996-04-25 1997-11-11 Komatsu Electron Metals Co Ltd 半導体ウェハの製造方法および半導体インゴットの面 取り加工装置
JP2001345294A (ja) 2000-05-31 2001-12-14 Toshiba Corp 半導体装置の製造方法
KR100438819B1 (ko) * 2000-07-05 2004-07-05 삼성코닝 주식회사 질화갈륨 단결정 기판의 제조방법
JP3933432B2 (ja) * 2001-09-10 2007-06-20 Ｈｏｙａ株式会社 ガラス基板のクランプ治具、ガラス基板の加工方法およびガラス基板
JP2004022899A (ja) * 2002-06-18 2004-01-22 Shinko Electric Ind Co Ltd 薄シリコンウエーハの加工方法
CN100515673C (zh) * 2005-10-13 2009-07-22 鸿富锦精密工业（深圳）有限公司 滚圆设备及滚圆方法
CN1962189B (zh) * 2005-11-11 2010-09-29 鸿富锦精密工业（深圳）有限公司 滚圆方法
CN100528472C (zh) * 2006-01-06 2009-08-19 鸿富锦精密工业（深圳）有限公司 滚圆治具及滚圆方法
CN100488713C (zh) * 2006-01-11 2009-05-20 鸿富锦精密工业（深圳）有限公司 滚圆治具组及滚圆方法
US20080044984A1 (en) * 2006-08-16 2008-02-21 Taiwan Semiconductor Manufacturing Co., Ltd. Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors
JP5384313B2 (ja) * 2008-12-24 2014-01-08 日本碍子株式会社 複合基板の製造方法及び複合基板
CN102237435B (zh) * 2010-04-21 2013-12-11 陕西众森电能科技有限公司 一种太阳电池的去边方法
US9676114B2 (en) * 2012-02-29 2017-06-13 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer edge trim blade with slots
US20140127857A1 (en) * 2012-11-07 2014-05-08 Taiwan Semiconductor Manufacturing Company, Ltd. Carrier Wafers, Methods of Manufacture Thereof, and Packaging Methods
US10000031B2 (en) * 2013-09-27 2018-06-19 Corning Incorporated Method for contour shaping honeycomb structures
JP6063436B2 (ja) * 2014-12-18 2017-01-18 Ｄｏｗａエレクトロニクス株式会社 ウェハ群、ウェハの製造装置、およびウェハの製造方法
CN107151817A (zh) * 2016-03-03 2017-09-12 上海新昇半导体科技有限公司 单晶硅的生长方法及其制备的单晶硅锭
JP2019166608A (ja) * 2018-03-26 2019-10-03 有限会社福島技研 研削装置
CN109048546B (zh) * 2018-08-31 2020-08-14 巫溪县玉帛石材有限公司 圆形石材磨边机
CN111113193B (zh) * 2019-12-25 2021-05-14 东莞市晶博光电股份有限公司 一种取消叠纸和分片的玻璃加工工艺
CN120080202B (zh) * 2025-04-29 2025-08-22 天通瑞宏科技有限公司 钽酸锂键合晶圆的减薄方法和设备

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US369074A (en) * 1887-08-30 pearce
DE924371C (de) * 1953-01-13 1955-02-28 Marienberger Mosaikplattenfabr Verfahren und Vorrichtung zum Schleifen von Wandfliesen od. dgl. auf Masshaltigkeit
US3274454A (en) * 1961-09-21 1966-09-20 Mallory & Co Inc P R Semiconductor multi-stack for regulating charging of current producing cells
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3475867A (en) * 1966-12-20 1969-11-04 Monsanto Co Processing of semiconductor wafers
US3567547A (en) * 1967-06-22 1971-03-02 John R Mattson Method of providing thin glass parts of precise dimensions
JPS5013155A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-06-06 1975-02-12
JPS55106762A (en) * 1979-02-06 1980-08-15 Nippon Sheet Glass Co Ltd Grinding method of glass side edge
US4344260A (en) * 1979-07-13 1982-08-17 Nagano Electronics Industrial Co., Ltd. Method for precision shaping of wafer materials
US4331452A (en) * 1980-08-04 1982-05-25 Fairchild Camera And Instrument Corporation Apparatus for crystal shaping
JPS6051700A (ja) * 1983-08-31 1985-03-23 Toshiba Corp シリコン結晶体の接合方法

Also Published As

Publication number Publication date
EP0226772A3 (en) 1988-07-06
KR870006623A (ko) 1987-07-13
JPS62154614A (ja) 1987-07-09
US5087307A (en) 1992-02-11
EP0226772A2 (en) 1987-07-01
JPH044744B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-01-29
EP0226772B1 (en) 1992-04-01
DE3684676D1 (de) 1992-05-07

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