KR900019047A - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR900019047A
KR900019047A KR1019900006247A KR900006247A KR900019047A KR 900019047 A KR900019047 A KR 900019047A KR 1019900006247 A KR1019900006247 A KR 1019900006247A KR 900006247 A KR900006247 A KR 900006247A KR 900019047 A KR900019047 A KR 900019047A
Authority
KR
South Korea
Prior art keywords
semiconductor memory
division operation
redundant circuit
memory cell
memory cells
Prior art date
Application number
KR1019900006247A
Other languages
English (en)
Other versions
KR940000902B1 (ko
Inventor
쓰가사 오오이시
요시오 마쓰다
가즈다미 아리모도
마사끼 쓰구데
가즈야쓰 후지시마
Original Assignee
시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 시기 모리야, 미쓰비시 뎅끼 가부시끼가이샤 filed Critical 시기 모리야
Publication of KR900019047A publication Critical patent/KR900019047A/ko
Application granted granted Critical
Publication of KR940000902B1 publication Critical patent/KR940000902B1/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/806—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by reducing size of decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

내용 없음

Description

반도체 기억장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 제1도의 반도체 기억장치에 포함되는 Rx서브디코더(15)의 회로를 표시하는 도면,
제3도는 제1도의 반도체 기억장치에 포함되는 스페어행 디코더(5a)의 회로를 표시하는 도면,
제4도는 제1도의 반도체기억장치에 포함되는 스페어 Rx서브 디코더(19)의 회로를 표시하는 도면.

Claims (1)

  1. 복수행 및 복수열로 배열된 복수의 메모리셀을 포함하고, 메모리셀 어레이를 다중분할 동작시켜, 다중분할 동작시키는 각각의 메모리셀의 블록에서 용장회로를 구비한 반도체기억장치에 있어서 상기 메모리셀의 분할된 각각의 블록에서 용장회로를 활성화하는 신호를 상기 전부, 또는 일부의 메모리셀의 블록에서 공유하는 것을 특징으로 하는 반도체 기억장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900006247A 1989-05-09 1990-05-03 반도체 기억장치 KR940000902B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP89-116527 1989-05-09
JP1-116527 1989-05-09
JP1116527A JP2547633B2 (ja) 1989-05-09 1989-05-09 半導体記憶装置

Publications (2)

Publication Number Publication Date
KR900019047A true KR900019047A (ko) 1990-12-22
KR940000902B1 KR940000902B1 (ko) 1994-02-04

Family

ID=14689337

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900006247A KR940000902B1 (ko) 1989-05-09 1990-05-03 반도체 기억장치

Country Status (4)

Country Link
US (2) US5982678A (ko)
JP (1) JP2547633B2 (ko)
KR (1) KR940000902B1 (ko)
DE (1) DE4014723A1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5452251A (en) 1992-12-03 1995-09-19 Fujitsu Limited Semiconductor memory device for selecting and deselecting blocks of word lines
KR950004623B1 (ko) * 1992-12-07 1995-05-03 삼성전자주식회사 리던던시 효율이 향상되는 반도체 메모리 장치
JP3351595B2 (ja) * 1993-12-22 2002-11-25 株式会社日立製作所 半導体メモリ装置
US6072735A (en) * 1998-06-22 2000-06-06 Lucent Technologies, Inc. Built-in redundancy architecture for computer memories
US6198675B1 (en) 1998-12-23 2001-03-06 Cray Inc. RAM configurable redundancy
JP2001143494A (ja) * 1999-03-19 2001-05-25 Toshiba Corp 半導体記憶装置
JP2000285694A (ja) * 1999-03-30 2000-10-13 Mitsubishi Electric Corp 半導体記憶装置および半導体記憶装置を搭載する半導体集積回路装置
US7656727B2 (en) * 2007-04-25 2010-02-02 Hewlett-Packard Development Company, L.P. Semiconductor memory device and system providing spare memory locations

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928560Y2 (ja) * 1979-11-13 1984-08-17 富士通株式会社 冗長ビットを有する記憶装置
DE3028813C2 (de) * 1980-07-30 1983-09-08 Christensen, Inc., 84115 Salt Lake City, Utah Verfahren und Vorrichtung zur Fernübertragung von Informationen
US4389715A (en) * 1980-10-06 1983-06-21 Inmos Corporation Redundancy scheme for a dynamic RAM
US4459685A (en) * 1982-03-03 1984-07-10 Inmos Corporation Redundancy system for high speed, wide-word semiconductor memories
JPS59151398A (ja) * 1983-02-17 1984-08-29 Mitsubishi Electric Corp 半導体記憶装置
US4639897A (en) * 1983-08-31 1987-01-27 Rca Corporation Priority encoded spare element decoder
JPH0666120B2 (ja) * 1983-11-09 1994-08-24 株式会社東芝 半導体記憶装置の冗長部
JPS6237479A (ja) * 1985-08-12 1987-02-18 日産自動車株式会社 無線式施解錠制御装置
JPS62222500A (ja) * 1986-03-20 1987-09-30 Fujitsu Ltd 半導体記憶装置
JPS62293598A (ja) * 1986-06-12 1987-12-21 Toshiba Corp 半導体記憶装置
JPH0810553B2 (ja) * 1986-06-13 1996-01-31 松下電器産業株式会社 記憶回路
JPS6355797A (ja) * 1986-08-27 1988-03-10 Fujitsu Ltd メモリ
US4837747A (en) * 1986-11-29 1989-06-06 Mitsubishi Denki Kabushiki Kaisha Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block
JPH0748315B2 (ja) * 1986-12-22 1995-05-24 三菱電機株式会社 半導体記憶装置
JP2629697B2 (ja) * 1987-03-27 1997-07-09 日本電気株式会社 半導体記憶装置
JP2590897B2 (ja) * 1987-07-20 1997-03-12 日本電気株式会社 半導体メモリ
US4807191A (en) * 1988-01-04 1989-02-21 Motorola, Inc. Redundancy for a block-architecture memory
US4885720A (en) * 1988-04-01 1989-12-05 International Business Machines Corporation Memory device and method implementing wordline redundancy without an access time penalty
JP2617779B2 (ja) * 1988-08-31 1997-06-04 三菱電機株式会社 半導体メモリ装置
JP2582439B2 (ja) * 1989-07-11 1997-02-19 富士通株式会社 書き込み可能な半導体記憶装置
KR950000504B1 (ko) * 1992-01-31 1995-01-24 삼성전자 주식회사 복수개의 로우 어드레스 스트로브 신호를 가지는 반도체 메모리 장치

Also Published As

Publication number Publication date
JPH02294999A (ja) 1990-12-05
US6075732A (en) 2000-06-13
JP2547633B2 (ja) 1996-10-23
US5982678A (en) 1999-11-09
KR940000902B1 (ko) 1994-02-04
DE4014723A1 (de) 1990-11-15
DE4014723C2 (ko) 1991-10-31

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