KR890011118A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR890011118A
KR890011118A KR1019880017729A KR880017729A KR890011118A KR 890011118 A KR890011118 A KR 890011118A KR 1019880017729 A KR1019880017729 A KR 1019880017729A KR 880017729 A KR880017729 A KR 880017729A KR 890011118 A KR890011118 A KR 890011118A
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KR
South Korea
Prior art keywords
gate electrode
semiconductor substrate
oxide film
forming
concentration
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Application number
KR1019880017729A
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English (en)
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KR910009042B1 (ko
Inventor
마사미 사이타
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR890011118A publication Critical patent/KR890011118A/ko
Application granted granted Critical
Publication of KR910009042B1 publication Critical patent/KR910009042B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7836Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관한 LDD 구조를 갖춘 반도체장치의 제조방법을 공정별로 나타낸 소자단면도.
제2도는 본 발명의 효과를 나타낸 그래프.
* 도면의 주요부분에 대한 부호의 설명
1,21 : 반도체기판 2,22 : 필드산화막
3,23 : 게이트산화막 4,24 : 게이트전극
6,26 : 저농도 n형영역 8,28 : 측벽부
9,29 : 고농도 n형영역 13,32 : 배선
14,33 : 패시베이션막

Claims (1)

  1. 제1도전형의 반도체기판(1)상에 산화막을 형성시키는 공정과, 이 산화막상에 전극재를 퇴적시키는 공정, 이 전극재를 소정의 형상으로 패터닝하여 게이트전극(4)을 형성시킨 다음 이 게이트전극(4)을 마스크로해서 상기 산화막을 제거시켜 상기 반도체기판(1)의 표면을 노출시키는 공정, 이 노출된 반도체기판(1)의 표면을 산화시키는 공정, 상기 게이트전극(4)을 마스크로 해서 상기 반도체기판(1)내에 상기 제1도전형과는 역도전형의 불순물을 저농도로 주입시키는 공정, 산화분위기중에서 열처리를 수행해서 상기 게이트전극(4)주위의 상기 반도체기판(1)내에 그 단부가 상기 게이트전극(4) 아래에 도달되도록 가로방향으로의 확산을 촉진시키는 조건에 의해 저농도 제2도전형영역(6)을 형성시키는 공정, 전체면에 산화막(7)을 퇴적시키는 공정, 이방성엣칭에 의해 상기 산화막(7)을 엣치백시켜 상기 게이트전극(4)의 측벽에 측벽부(8)를 형성시키는 공정, 이 측벽부(8)와 상기 게이트전극(4)을 마스크로해서 상기 제2도전형의 불순물을 고농도로 주입확산시킴으로써 상기 저농도 제2도전형영역보다도 고농도인 고농도 제2도전형영역(9)을 형성시키는 공정을 구비한 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880017729A 1987-12-28 1988-12-28 반도체장치의 제조방법 KR910009042B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62332178A JPH01173756A (ja) 1987-12-28 1987-12-28 半導体装置の製造方法
JP62-332178 1987-12-28

Publications (2)

Publication Number Publication Date
KR890011118A true KR890011118A (ko) 1989-08-12
KR910009042B1 KR910009042B1 (ko) 1991-10-28

Family

ID=18252036

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880017729A KR910009042B1 (ko) 1987-12-28 1988-12-28 반도체장치의 제조방법

Country Status (3)

Country Link
EP (1) EP0322886A3 (ko)
JP (1) JPH01173756A (ko)
KR (1) KR910009042B1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5171700A (en) * 1991-04-01 1992-12-15 Sgs-Thomson Microelectronics, Inc. Field effect transistor structure and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4366613A (en) * 1980-12-17 1983-01-04 Ibm Corporation Method of fabricating an MOS dynamic RAM with lightly doped drain
JPS58158972A (ja) * 1982-03-16 1983-09-21 Toshiba Corp 半導体装置の製造方法
EP0173953B1 (en) * 1984-08-28 1991-07-17 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device having a gate electrode
JPS61139070A (ja) * 1984-12-12 1986-06-26 Hitachi Ltd 半導体装置
EP0187016B1 (en) * 1984-12-27 1991-02-20 Kabushiki Kaisha Toshiba Misfet with lightly doped drain and method of manufacturing the same

Also Published As

Publication number Publication date
EP0322886A3 (en) 1990-03-21
EP0322886A2 (en) 1989-07-05
JPH01173756A (ja) 1989-07-10
KR910009042B1 (ko) 1991-10-28

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