KR890009004A - 바이폴라-cmos 회로 - Google Patents

바이폴라-cmos 회로 Download PDF

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Publication number
KR890009004A
KR890009004A KR1019880015073A KR880015073A KR890009004A KR 890009004 A KR890009004 A KR 890009004A KR 1019880015073 A KR1019880015073 A KR 1019880015073A KR 880015073 A KR880015073 A KR 880015073A KR 890009004 A KR890009004 A KR 890009004A
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KR
South Korea
Prior art keywords
bipolar transistor
bipolar
diode
power supply
transistor
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Application number
KR1019880015073A
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English (en)
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KR920010203B1 (en
Inventor
아시오 후꾸시
다끼히사 무로이
Original Assignee
야마모도 다꾸마
후지쓰 가부시끼가이샤
나까노 히로유끼
후지쓰 브이엘에스아이 가부시기가이샤
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Application filed by 야마모도 다꾸마, 후지쓰 가부시끼가이샤, 나까노 히로유끼, 후지쓰 브이엘에스아이 가부시기가이샤 filed Critical 야마모도 다꾸마
Publication of KR890009004A publication Critical patent/KR890009004A/ko
Application granted granted Critical
Publication of KR920010203B1 publication Critical patent/KR920010203B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00307Modifications for increasing the reliability for protection in bipolar transistor circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • Ceramic Engineering (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

내용 없음

Description

바이폴라-CMOS 회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 5 도는 본 발명의 바람직한 실시예의 회로도,
제 6 도는 제5도 바람직한 실시예에서 신호의 파형도.
제7A도는 제5도 회로에서 바이폴라 회로부의 평면도.
제7B도는 선(I-I)을 따라 취한 단면도.
제7C도는 선(Ⅱ-Ⅱ)을 따라 취한 단면도.

Claims (5)

  1. 제1 및 제2전원; 상기 제1전원과 상기 제2전원 사이에 직렬로 접속되며 게이트에 입력신호가 인가되는 제1 및 제2금속 산화물 반도체(MOS) 트랜지스터로 구성되는 논리수단; 콜렉터가 상기 제1전원에 접속되고 베이스가 상기 제1MOS 트랜지스터와 제2MOS 트랜지스터 사이의 접속점에 접속되는 제1바이폴라 트랜지스터 ; 에미터가 상기 제2전원에 접속되고, 콜렉터가 상기 제1바이폴라 트랜지스터의 에미터에 접속 되어 회로의 출력단자로서 사용되는 제2바이폴라 트랜지스터 ; 상기 제2바이폴라 트랜지스터의 베이스와 상기 회로의 출력단자 사이에 접속되며, 상기 입력신호가 게이트에 공급되는 제3MOS 트랜지스터 ; 및 애노드가 상기 제1바이폴라 트랜지스터의 에미터에 접속되고 캐소드가 상기 제1바이폴랄 트랜지스터의 베이스에 접속되는 다이오드로 구성되는 것을 특징으로 하는 바이폴라-상보형 금속산화물 반도체(CMOS)회로.
  2. 제1항에 있어서, 입력신호가 로우레벨에서 하이레벨로 전환될때 출력단자로부터 다이오드와 제2MOS 트랜지스터를 통하여 제2전원으로 전류가 흐르는 것을 특징으로 하는 바이폴라-CMOS 회로.
  3. 제1항에 있어서, 다이오드는 다이오드의 애노드가 바이폴라 트랜지스터의 콜랙터와 베이스가 상호 접속된 것이고, 다이오드의 캐소드는 상기 바이폴라 트랜지스터의 에미터인 바이폴라 트랜지스터로 구성되는 것을 특징으로 하는 바이폴라-CMOS 회로.
  4. 제3항에 있어서, 다이오드인 바이폴라 트랜지스터의 콜렉터와 제1바이폴라 트랜지스터의 콜렉터는 반도체 기판에 형성되는 불순물 확산영역에 의해 공통으로 형성되는 것을 특징으로 하는 바이폴라-CMOS 회로.
  5. 제1항에 있어서, 더우기 출력단자와 부전원 사이에 제4MOS 트랜지스터를 구비하여 이루어지는 것을 특징으로 하는 바이폴라-CMOS 회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR8815073A 1987-11-16 1988-11-16 Bipolar-cmos circuit KR920010203B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62-288728 1987-11-16
JP62288728A JPH01129451A (ja) 1987-11-16 1987-11-16 半導体装置

Publications (2)

Publication Number Publication Date
KR890009004A true KR890009004A (ko) 1989-07-13
KR920010203B1 KR920010203B1 (en) 1992-11-21

Family

ID=17733918

Family Applications (1)

Application Number Title Priority Date Filing Date
KR8815073A KR920010203B1 (en) 1987-11-16 1988-11-16 Bipolar-cmos circuit

Country Status (5)

Country Link
US (1) US4890018A (ko)
EP (1) EP0316793B1 (ko)
JP (1) JPH01129451A (ko)
KR (1) KR920010203B1 (ko)
DE (1) DE3887457D1 (ko)

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JPH02224415A (ja) * 1989-02-27 1990-09-06 Nec Corp BiCMOS論理回路
JPH0766958B2 (ja) * 1989-03-20 1995-07-19 株式会社東芝 静電保護回路
US5173623A (en) * 1989-05-15 1992-12-22 Texas Instruments Incorporated High performance BiCMOS logic circuits with full output voltage swing up to four predetermined voltage values
US4970414A (en) * 1989-07-07 1990-11-13 Silicon Connections Corporation TTL-level-output interface circuit
JP2546904B2 (ja) * 1990-01-31 1996-10-23 三菱電機株式会社 半導体論理回路
US5079447A (en) * 1990-03-20 1992-01-07 Integrated Device Technology BiCMOS gates with improved driver stages
US5030853A (en) * 1990-03-21 1991-07-09 Thunderbird Technologies, Inc. High speed logic and memory family using ring segment buffer
US5105105A (en) * 1990-03-21 1992-04-14 Thunderbird Technologies, Inc. High speed logic and memory family using ring segment buffer
JPH0440014A (ja) * 1990-06-05 1992-02-10 Mitsubishi Electric Corp 論理回路装置
US5153464A (en) * 1990-12-14 1992-10-06 Hewlett-Packard Company Bicmos tri-state output buffer
US5101120A (en) * 1991-05-16 1992-03-31 International Business Machines Corporation BiCMOS output driver
JP2533968Y2 (ja) * 1991-08-26 1997-04-30 日本軽金属株式会社 電磁波シールドパネルの連結構造
JP2712097B2 (ja) * 1992-07-27 1998-02-10 株式会社東芝 BiCMOS論理回路
US5399918A (en) * 1993-09-30 1995-03-21 Intel Corporation Large fan-in, dynamic, bicmos logic gate

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JPS59196625A (ja) * 1983-04-22 1984-11-08 Nec Corp 論理回路
JPH0693626B2 (ja) * 1983-07-25 1994-11-16 株式会社日立製作所 半導体集積回路装置
JPS60125015A (ja) * 1983-12-12 1985-07-04 Hitachi Ltd インバ−タ回路
JPH0616585B2 (ja) * 1983-12-16 1994-03-02 株式会社日立製作所 バツフア回路
JPS60141018A (ja) * 1983-12-28 1985-07-26 Nec Corp バイポ−ラ−cmos混成集積回路
JPS60177723A (ja) * 1984-02-24 1985-09-11 Hitachi Ltd 出力回路
JPH0671067B2 (ja) * 1985-11-20 1994-09-07 株式会社日立製作所 半導体装置
JPS62102621A (ja) * 1985-10-29 1987-05-13 Nec Corp 論理回路
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US4845385A (en) * 1988-06-21 1989-07-04 Silicon Connections Corporation BiCMOS logic circuits with reduced crowbar current

Also Published As

Publication number Publication date
US4890018A (en) 1989-12-26
KR920010203B1 (en) 1992-11-21
EP0316793A2 (en) 1989-05-24
EP0316793A3 (en) 1990-06-27
JPH01129451A (ja) 1989-05-22
EP0316793B1 (en) 1994-01-26
DE3887457D1 (de) 1994-03-10

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