KR890001200A - 파워 모스 트랜지스터 구조 - Google Patents

파워 모스 트랜지스터 구조 Download PDF

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KR890001200A
KR890001200A KR1019880007239A KR880007239A KR890001200A KR 890001200 A KR890001200 A KR 890001200A KR 1019880007239 A KR1019880007239 A KR 1019880007239A KR 880007239 A KR880007239 A KR 880007239A KR 890001200 A KR890001200 A KR 890001200A
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region
drain
source
connection layer
mos transistor
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KR1019880007239A
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외제느 또넬
질르 토마스
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왈 장-클로드
에스지에스-톰슨 마이크로일렉트로닉스 에스.에이.
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Publication of KR890001200A publication Critical patent/KR890001200A/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41741Source or drain electrodes for field effect devices for vertical or pseudo-vertical devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7809Vertical DMOS transistors, i.e. VDMOS transistors having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

파워 모스 트랜지터 구조
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1D도는 본 발명의 장정들을 강조하는 상태도.
제2A도 내지 제2C도는 본 발명에 따른 제1,제2, 및 제3접속 레벨의 평면도.
제3도는 본 발명에 특히 적합한 N채널 DMOS 트랜지스터 구조의 단면도.

Claims (5)

  1. 동일한 기판면에서 게이트 접촉영역, 소스접촉 영역, 드레인 접속영역 및 세 접속층 레벨로 구성되고, 제1접속층레벨(20)은 모든 게이트들과 접촉을 이루고 각 게이트와 인접한 게이트 사이의 접속을 이루며, 이 제1접속층은 소스 접촉영역 및 드레인 접촉영역 상부의 개구부로 구성되는 병렬파워 모수 트랜지스터 구조에 있어서, 소스 접촉 영역 및 드레인 접촉영역 상부에서 개방된 제1분리층과, 모든 소스 영역(22) 및 드레인 영역(23)과 접촉을 이루고 각 소스, (혹은 드레인)영역 및 인접한 소스(혹은 드레인) 영역간의 접속을 이루며 각 드레인(혹은 소스) 접점을 분리시키는 개구부를 포함하는 제2접속층 레벨과, 드레인 영역 혹은 소스영역 위에서 개방된 제2분리층과, 제2접속층 레벨의 모든 드레인 영역 혹은 소스영역과 접촉을 이루는 제3연속접속층 레벨(25)이 추가로 구성됨이 특정인 병렬 파워 모스 트랜지스터 구조.
  2. 제1항에 있어서, 제1접속층 레벨은 다결정 실리콘 및 규소화합물로 구성되고, 제2 및 제3접속층 레벨은 금속도금층으로 구성됨이 특징인 모스 트랜지스터 구조.
  3. 각 트랜지스터는 제1항에 따른 구조로 이루어지고, 제1형태의 모스 트랜지스터에서 제2접속층은 소스와 결합되며, 제2형태의 모스 트랜지스터에서 제2접속층은 드레인과 접속됨이 특징인 상보 모스 트랜지스터 구조.
  4. 제3항에 있어서, DMOS형 측방향 N채널 트랜지스터 및 확장 드레인형 측방향 P채널 트랜지스터로 구성되고 N채널 DOMS의 채널영역(33)은 전계 산화물층(40)에 의하여 드레인 영역(35)으로부터 분리되고, POMS의 드레인 확장 영역(61)은 전계 산화물 영역(60) 아래에서 형성됨이 특징인 모놀리식 집적회로 형태의 상보 모스 트랜지스터(CMOS)구조.
  5. 제4항에 있어서, PMOS의 드레인 확장 영역(61)의 도우핑은 전계 산화물 영역(60)을 성장시키기 전에 자동 배열되는 방법으로 수행된 결과임이 특징인 상보 모스 트랜지스터 구조.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880007239A 1987-06-22 1988-06-16 파워 모스 트랜지스터 구조 KR890001200A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR87/09157 1987-06-22
FR8709157A FR2616966B1 (fr) 1987-06-22 1987-06-22 Structure de transistors mos de puissance

Publications (1)

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KR890001200A true KR890001200A (ko) 1989-03-18

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US (1) US4890142A (ko)
EP (1) EP0296997B1 (ko)
JP (1) JP2842871B2 (ko)
KR (1) KR890001200A (ko)
DE (1) DE3873839T2 (ko)
FR (1) FR2616966B1 (ko)

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Also Published As

Publication number Publication date
EP0296997A1 (fr) 1988-12-28
FR2616966A1 (fr) 1988-12-23
JP2842871B2 (ja) 1999-01-06
US4890142A (en) 1989-12-26
DE3873839T2 (de) 1993-05-13
JPS6420666A (en) 1989-01-24
EP0296997B1 (fr) 1992-08-19
DE3873839D1 (de) 1992-09-24
FR2616966B1 (fr) 1989-10-27

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