IT1252625B - Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti - Google Patents
Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenutiInfo
- Publication number
- IT1252625B IT1252625B ITMI913267A ITMI913267A IT1252625B IT 1252625 B IT1252625 B IT 1252625B IT MI913267 A ITMI913267 A IT MI913267A IT MI913267 A ITMI913267 A IT MI913267A IT 1252625 B IT1252625 B IT 1252625B
- Authority
- IT
- Italy
- Prior art keywords
- gate
- source
- igfet
- field
- manufacturing process
- Prior art date
Links
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000151 deposition Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 230000003647 oxidation Effects 0.000 abstract 2
- 238000007254 oxidation reaction Methods 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 210000000746 body region Anatomy 0.000 abstract 1
- 230000008021 deposition Effects 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/126—Power FETs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Le fasi del processo comprendono la crescita epitassiale di uno strato di silicio su un substrato di silicio monocristallino, l'ossidazione del fronte (ossidazione di campo), l'impiantazione del deep body, la definizione delle aree attive del dispositivo, la deposizione e il drogaggio di uno strato di silicio policristallino di gate, la definizione di regioni di gate, la definizione di regioni di body e di source, i processi di definizione e diffusione della regione (6) di body e della regione (7) di source essendo effettuati prima della deposizione dello strato (5) di silicio policristallino di gate.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI913267A IT1252625B (it) | 1991-12-05 | 1991-12-05 | Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti |
EP92203670A EP0545484B1 (en) | 1991-12-05 | 1992-11-27 | Manufacturing process for insulated gate field effect transistors (igfet) with low short circuit density between gate and source and devices obtained thereby |
DE69233154T DE69233154D1 (de) | 1991-12-05 | 1992-11-27 | Verfahren zur Herstellung von Feldeffekttransistoren mit isoliertem Gatter (IGFET) und niedriger Kurzschlussdichte zwischen Gatter und Quelle; dadurch hergestellte Bauelementen |
JP4325520A JPH06302826A (ja) | 1991-12-05 | 1992-12-04 | 絶縁ゲート電界効果トランジスタ及びその製造方法 |
US07/987,759 US5474944A (en) | 1991-12-05 | 1992-12-07 | Process for manufacturing integrated circuit with power field effect transistors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ITMI913267A IT1252625B (it) | 1991-12-05 | 1991-12-05 | Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti |
Publications (3)
Publication Number | Publication Date |
---|---|
ITMI913267A0 ITMI913267A0 (it) | 1991-12-05 |
ITMI913267A1 ITMI913267A1 (it) | 1993-06-05 |
IT1252625B true IT1252625B (it) | 1995-06-19 |
Family
ID=11361269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITMI913267A IT1252625B (it) | 1991-12-05 | 1991-12-05 | Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti |
Country Status (5)
Country | Link |
---|---|
US (1) | US5474944A (it) |
EP (1) | EP0545484B1 (it) |
JP (1) | JPH06302826A (it) |
DE (1) | DE69233154D1 (it) |
IT (1) | IT1252625B (it) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1254799B (it) * | 1992-02-18 | 1995-10-11 | St Microelectronics Srl | Transistore vdmos con migliorate caratteristiche di tenuta di tensione. |
US5877044A (en) * | 1997-03-11 | 1999-03-02 | Harris Corporation | Method of making MOS-gated semiconductor devices |
US6342431B2 (en) | 1998-10-14 | 2002-01-29 | International Business Machines Corporation | Method for eliminating transfer gate sacrificial oxide |
US6365932B1 (en) | 1999-08-20 | 2002-04-02 | Denso Corporation | Power MOS transistor |
JP2012064873A (ja) * | 2010-09-17 | 2012-03-29 | Rohm Co Ltd | 半導体装置およびその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1213234B (it) * | 1984-10-25 | 1989-12-14 | Sgs Thomson Microelectronics | Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos. |
JPH0738444B2 (ja) * | 1986-04-09 | 1995-04-26 | 日本電気株式会社 | 縦型電界効果トランジスタの製造方法 |
JP2723147B2 (ja) * | 1986-06-25 | 1998-03-09 | 株式会社日立製作所 | 半導体集積回路装置の製造方法 |
EP0255970B1 (en) * | 1986-08-08 | 1993-12-15 | Philips Electronics Uk Limited | A method of manufacturing an insulated gate field effect transistor |
FR2616966B1 (fr) * | 1987-06-22 | 1989-10-27 | Thomson Semiconducteurs | Structure de transistors mos de puissance |
JPH01146367A (ja) * | 1987-12-02 | 1989-06-08 | Nec Corp | 電界効果トランジスタ |
JP2604777B2 (ja) * | 1988-01-18 | 1997-04-30 | 松下電工株式会社 | 二重拡散型電界効果半導体装置の製法 |
JPH01189175A (ja) * | 1988-01-23 | 1989-07-28 | Matsushita Electric Works Ltd | 二重拡散型電界効果半導体装置 |
US5119162A (en) * | 1989-02-10 | 1992-06-02 | Texas Instruments Incorporated | Integrated power DMOS circuit with protection diode |
US4998151A (en) * | 1989-04-13 | 1991-03-05 | General Electric Company | Power field effect devices having small cell size and low contact resistance |
-
1991
- 1991-12-05 IT ITMI913267A patent/IT1252625B/it active IP Right Grant
-
1992
- 1992-11-27 EP EP92203670A patent/EP0545484B1/en not_active Expired - Lifetime
- 1992-11-27 DE DE69233154T patent/DE69233154D1/de not_active Expired - Lifetime
- 1992-12-04 JP JP4325520A patent/JPH06302826A/ja active Pending
- 1992-12-07 US US07/987,759 patent/US5474944A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0545484A2 (en) | 1993-06-09 |
US5474944A (en) | 1995-12-12 |
DE69233154D1 (de) | 2003-09-18 |
ITMI913267A0 (it) | 1991-12-05 |
ITMI913267A1 (it) | 1993-06-05 |
EP0545484A3 (en) | 1996-11-20 |
JPH06302826A (ja) | 1994-10-28 |
EP0545484B1 (en) | 2003-08-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3890632A (en) | Stabilized semiconductor devices and method of making same | |
US4377030A (en) | Metallization of selectively implanted AIII -BV compound semiconductors | |
US4476622A (en) | Recessed gate static induction transistor fabrication | |
US4375124A (en) | Power static induction transistor fabrication | |
KR930001477A (ko) | 모스패트의 제조 방법 | |
ATE341833T1 (de) | Dünnfilmtransistoren und deren herstellungsverfahren | |
IT1252625B (it) | Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti | |
SE9300211L (sv) | Dielektriskt isolerad halvledaranordning och förfarande för dess framställning | |
KR890001190A (ko) | 반도체 기억소자 및 제조방법 | |
KR940004852A (ko) | 모스트랜지스터 구조 및 제조방법 | |
KR940001506B1 (ko) | 모오스 소자 격리 방법 | |
JPH02159070A (ja) | 半導体装置とその製造方法 | |
KR940010922B1 (ko) | 박막 전계 트랜지스터의 구조 | |
KR940001398B1 (ko) | Mosfet 제조방법 | |
KR940003086A (ko) | 반도체 장치의 박막트랜지스터 제조방법 | |
KR0172814B1 (ko) | 실리콘 성장을 이용한 soi의 제조방법 | |
KR940016927A (ko) | 트렌치(Trench) 구조를 이용한 수직 채널을 갖는 모스트랜지스터(MOS-FET) 제조방법 | |
KR950005490B1 (ko) | 인헨스먼트형/디플리션형 전계효과 트랜지스터 및 그 제조방법 | |
KR0172810B1 (ko) | Ldd 트랜지스터 제조방법 | |
KR940005733B1 (ko) | 트렌치형 mos 트랜지스터 제조방법 | |
JPS6424463A (en) | Semiconductor device and manufacture thereof | |
KR960043252A (ko) | 박막 트랜지스터 제조 방법 | |
JPH04233739A (ja) | 電界効果トランジスタ | |
KR930015111A (ko) | Mos 트랜지스터 제조방법 및 그 구조 | |
KR940016924A (ko) | 고속소자용 트랜지스터 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19961227 |