IT1252625B - Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti - Google Patents

Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti

Info

Publication number
IT1252625B
IT1252625B ITMI913267A ITMI913267A IT1252625B IT 1252625 B IT1252625 B IT 1252625B IT MI913267 A ITMI913267 A IT MI913267A IT MI913267 A ITMI913267 A IT MI913267A IT 1252625 B IT1252625 B IT 1252625B
Authority
IT
Italy
Prior art keywords
gate
source
igfet
field
manufacturing process
Prior art date
Application number
ITMI913267A
Other languages
English (en)
Inventor
Raffaele Zambrano
Original Assignee
Cons Ric Microelettronica
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cons Ric Microelettronica filed Critical Cons Ric Microelettronica
Priority to ITMI913267A priority Critical patent/IT1252625B/it
Publication of ITMI913267A0 publication Critical patent/ITMI913267A0/it
Priority to EP92203670A priority patent/EP0545484B1/en
Priority to DE69233154T priority patent/DE69233154D1/de
Priority to JP4325520A priority patent/JPH06302826A/ja
Priority to US07/987,759 priority patent/US5474944A/en
Publication of ITMI913267A1 publication Critical patent/ITMI913267A1/it
Application granted granted Critical
Publication of IT1252625B publication Critical patent/IT1252625B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712Vertical DMOS transistors, i.e. VDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
    • H01L29/42368Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/126Power FETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

Le fasi del processo comprendono la crescita epitassiale di uno strato di silicio su un substrato di silicio monocristallino, l'ossidazione del fronte (ossidazione di campo), l'impiantazione del deep body, la definizione delle aree attive del dispositivo, la deposizione e il drogaggio di uno strato di silicio policristallino di gate, la definizione di regioni di gate, la definizione di regioni di body e di source, i processi di definizione e diffusione della regione (6) di body e della regione (7) di source essendo effettuati prima della deposizione dello strato (5) di silicio policristallino di gate.
ITMI913267A 1991-12-05 1991-12-05 Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti IT1252625B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
ITMI913267A IT1252625B (it) 1991-12-05 1991-12-05 Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti
EP92203670A EP0545484B1 (en) 1991-12-05 1992-11-27 Manufacturing process for insulated gate field effect transistors (igfet) with low short circuit density between gate and source and devices obtained thereby
DE69233154T DE69233154D1 (de) 1991-12-05 1992-11-27 Verfahren zur Herstellung von Feldeffekttransistoren mit isoliertem Gatter (IGFET) und niedriger Kurzschlussdichte zwischen Gatter und Quelle; dadurch hergestellte Bauelementen
JP4325520A JPH06302826A (ja) 1991-12-05 1992-12-04 絶縁ゲート電界効果トランジスタ及びその製造方法
US07/987,759 US5474944A (en) 1991-12-05 1992-12-07 Process for manufacturing integrated circuit with power field effect transistors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI913267A IT1252625B (it) 1991-12-05 1991-12-05 Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti

Publications (3)

Publication Number Publication Date
ITMI913267A0 ITMI913267A0 (it) 1991-12-05
ITMI913267A1 ITMI913267A1 (it) 1993-06-05
IT1252625B true IT1252625B (it) 1995-06-19

Family

ID=11361269

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI913267A IT1252625B (it) 1991-12-05 1991-12-05 Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti

Country Status (5)

Country Link
US (1) US5474944A (it)
EP (1) EP0545484B1 (it)
JP (1) JPH06302826A (it)
DE (1) DE69233154D1 (it)
IT (1) IT1252625B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1254799B (it) * 1992-02-18 1995-10-11 St Microelectronics Srl Transistore vdmos con migliorate caratteristiche di tenuta di tensione.
US5877044A (en) * 1997-03-11 1999-03-02 Harris Corporation Method of making MOS-gated semiconductor devices
US6342431B2 (en) 1998-10-14 2002-01-29 International Business Machines Corporation Method for eliminating transfer gate sacrificial oxide
US6365932B1 (en) 1999-08-20 2002-04-02 Denso Corporation Power MOS transistor
JP2012064873A (ja) * 2010-09-17 2012-03-29 Rohm Co Ltd 半導体装置およびその製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1213234B (it) * 1984-10-25 1989-12-14 Sgs Thomson Microelectronics Procedimento perfezionato per la fabbricazione di dispositivi a semiconduttore dmos.
JPH0738444B2 (ja) * 1986-04-09 1995-04-26 日本電気株式会社 縦型電界効果トランジスタの製造方法
JP2723147B2 (ja) * 1986-06-25 1998-03-09 株式会社日立製作所 半導体集積回路装置の製造方法
EP0255970B1 (en) * 1986-08-08 1993-12-15 Philips Electronics Uk Limited A method of manufacturing an insulated gate field effect transistor
FR2616966B1 (fr) * 1987-06-22 1989-10-27 Thomson Semiconducteurs Structure de transistors mos de puissance
JPH01146367A (ja) * 1987-12-02 1989-06-08 Nec Corp 電界効果トランジスタ
JP2604777B2 (ja) * 1988-01-18 1997-04-30 松下電工株式会社 二重拡散型電界効果半導体装置の製法
JPH01189175A (ja) * 1988-01-23 1989-07-28 Matsushita Electric Works Ltd 二重拡散型電界効果半導体装置
US5119162A (en) * 1989-02-10 1992-06-02 Texas Instruments Incorporated Integrated power DMOS circuit with protection diode
US4998151A (en) * 1989-04-13 1991-03-05 General Electric Company Power field effect devices having small cell size and low contact resistance

Also Published As

Publication number Publication date
EP0545484A2 (en) 1993-06-09
US5474944A (en) 1995-12-12
DE69233154D1 (de) 2003-09-18
ITMI913267A0 (it) 1991-12-05
ITMI913267A1 (it) 1993-06-05
EP0545484A3 (en) 1996-11-20
JPH06302826A (ja) 1994-10-28
EP0545484B1 (en) 2003-08-13

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Legal Events

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