KR850005148A - 절단막으로부터 반도체 웨이퍼의 제거방법 - Google Patents

절단막으로부터 반도체 웨이퍼의 제거방법 Download PDF

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KR850005148A
KR850005148A KR1019840006939A KR840006939A KR850005148A KR 850005148 A KR850005148 A KR 850005148A KR 1019840006939 A KR1019840006939 A KR 1019840006939A KR 840006939 A KR840006939 A KR 840006939A KR 850005148 A KR850005148 A KR 850005148A
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semiconductor wafer
microns
support film
thickness
adhesive
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KR1019840006939A
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English (en)
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앤토니 오리키오 죠세프
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로버트 씨. 술리반
스타우퍼 케미칼 캄파니
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Publication of KR850005148A publication Critical patent/KR850005148A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
    • B28D5/0082—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material for supporting, holding, feeding, conveying or discharging work
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10S156/918—Delaminating processes adapted for specified product, e.g. delaminating medical specimen slide
    • Y10S156/93—Semiconductive product delaminating, e.g. delaminating emiconductive wafer from underlayer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062—Prior to assembly
    • Y10T156/1075—Prior to assembly of plural laminae from single stock and assembling to each other or to additional lamina
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/11—Methods of delaminating, per se; i.e., separating at bonding face
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/19—Delaminating means

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Dicing (AREA)
  • Die Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Adhesive Tapes (AREA)

Abstract

내용 없음

Description

절단막으로부터 반도체 웨이퍼의 제거방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 절단막 및 인쇄 웨이퍼와의 접촉을 위한 그 점착성의 전도성 점착제 원형을 나타내는 사시도.
제2도는 본원 발명에 따라 사용하기에 적합한 절단막의 실시양태의 부분확대 단면도.
제3도는 본원 발명에 따라 사용하기에 적합한 절단막의 실시양태의 상향도.
제4도는 웨이퍼가 절단막으로 이송되기 위하여 들어올려지는 실시양태를 나타낸도.
제5도는 웨이퍼와 점착제가 부착되기 전의 웨이퍼 및 점착제 원형의 배열을 설명한 도.
제6도는 웨이퍼/점착제의 부착 절차를 나타낸 도.

Claims (13)

  1. (a) 웨이퍼를 전도성 점착제가 결합되는 측면에 실질적으로 릴리이스 층이 없는 플라스틱 지지막에 결합되는 전도성 점착제에 부착하고, (b) 상기 웨이퍼를 절단하기 전에, 전도성 점착제 및 지지막 사이의 탈리(脫離) 특성을 향상시키기 위하여, 상기 결과 생성물을 가열하며 (c) 절단단게가 완료된 후에 지지막위에 실질적으로 잔여의 점착제를 남기지 않고서, 칩을 결합된 점착제와 함께 제거함으로써 이루어지는 절단막으로부터 반도체 웨이퍼의 제거방법.
  2. 지지막은 폴리올레핀 중합체로 형성되는 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  3. 지지막은 폴리프로필렌으로 이루어지는 특허청구의범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  4. 지지막은 약 25미크론∼약 150미크론의 두께를 가진 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  5. 지지막은 약 25∼150미크론의 두께의 폴리올레핀인 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법
  6. 지지막은 약 25∼150미크론의 두께의 폴리프로필렌인 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  7. 전도성 점착제는 약 6∼약 40미크론의 두께를 가지는 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  8. 전도성 점착제는 점착제 매트릭스내에 유효량의 전도성 금속을 함유하는 것을 특징으로 하는 특허청구의 범위1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  9. 지지막은 약 25∼150미크론의 두께를 가지며, 점착제는 약 6∼40미크론의 두께를 가지는 특허청구의 범위 2기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  10. 약 6∼약 40미크론 두께의 전도성 점착제를 가지며, 그리고 상기 점착제는 점착제 매트릭스내에 유효량의 전도성 금속을 함유하는 것을 특징으로 하는 특허 청구의 범위 3기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  11. 단계(b)에서의 가열은 약 45℃∼약 70℃의 온도하에서 약 0.25분∼약3분동안 가열되는 것을 특징으로 하는 특허청구의 범위 1기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  12. 단계(b)에서의 가열은 약 45℃∼약 70℃의 온도하에서 약 0.25∼약 3분동안 가열되는 것을 특징으로 하는 특허청구의 범위 2기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
  13. 단계(c)에서의 가열은 약 45℃∼약 70℃의 온도하에서 약 0.25분∼약 3분동안 가열되는 것을 특징으로 하는 특허청구의 범위 3기재의 절단막으로부터 반도체 웨이퍼의 제거방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019840006939A 1983-12-19 1984-11-06 절단막으로부터 반도체 웨이퍼의 제거방법 KR850005148A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US562899 1983-12-19
US06/562,899 US4664739A (en) 1983-12-19 1983-12-19 Removal of semiconductor wafers from dicing film

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KR850005148A true KR850005148A (ko) 1985-08-21

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US (1) US4664739A (ko)
EP (1) EP0146197A3 (ko)
JP (1) JPS60136331A (ko)
KR (1) KR850005148A (ko)
PH (1) PH21462A (ko)

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US3600246A (en) * 1968-05-17 1971-08-17 Rca Corp Method of making laminated semiconductor devices
GB1299177A (en) * 1969-01-17 1972-12-06 Ciba Geigy Uk Ltd Reinforced composites
FR2081250A1 (en) * 1970-03-23 1971-12-03 Silec Semi Conducteurs Abrasive jet cutting of semiconductor slices - using resin mask
US3963551A (en) * 1974-03-05 1976-06-15 Stromberg-Carlson Corporation Method for bonding semiconductor chips
JPS5542326U (ko) * 1978-09-12 1980-03-18
JPS59105327A (ja) * 1982-12-08 1984-06-18 Toshiba Corp 半導体素子の半田付け方法

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EP0146197A3 (en) 1986-12-30
US4664739A (en) 1987-05-12
EP0146197A2 (en) 1985-06-26
JPH0334853B2 (ko) 1991-05-24
JPS60136331A (ja) 1985-07-19
PH21462A (en) 1987-10-28

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