KR840000941A - 다이나믹형 mos 메모리 장치 - Google Patents
다이나믹형 mos 메모리 장치 Download PDFInfo
- Publication number
- KR840000941A KR840000941A KR1019820002748A KR820002748A KR840000941A KR 840000941 A KR840000941 A KR 840000941A KR 1019820002748 A KR1019820002748 A KR 1019820002748A KR 820002748 A KR820002748 A KR 820002748A KR 840000941 A KR840000941 A KR 840000941A
- Authority
- KR
- South Korea
- Prior art keywords
- memory device
- mos memory
- word line
- switch mosfets
- line
- Prior art date
Links
- 238000010586 diagram Methods 0.000 description 2
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시를 표시하는 다이나믹형 메모리 시스템의 구분 회로도.
제2도는 본 발명의 실시를 표시하는 다이나믹형 메모리 장치의 구분 회로도.
Claims (3)
- 다수개의 게이트라인과 각 게이트라인에 대응하는 곳에 배치되어 있는 다수개의 신정 스위치 MOSFET와 상기한 다수개의 선정스위치 MOSFET들을 제어하기 위한 제어회로와 또, 각 게이트라인과 접지전위 사이에 연결배치되어 있고 각각 자체의 제어단자(制御端子)를 갖는 다수개의 저항체와 상기한 각 선정 스위치 MOSFET의 입력측 전극에 공급하게 되는 타이밍 신호를 받아서 제어단자에 보내지는 제어신호를 만드는 인버터 회로들을 포함하는 다이나믹형 MOS 메모리장치. 여기서 상기의 타이밍 신호는 상기의 제어회로의 한 동작이 끝나는 것과 실제적으로 동기가 되어 공급전원 전압레벨까지 상승하게 된다.
- 청구범위 제1항의 다이나믹형 MOS 메모리 장치에서 전술한 게이트라인 즉, 메모리셀을 선정하기 위한 워드라인과 메모리셀을 선정하기 위한 데이터라인.
- 전술한 각 워드라인의 대응하는 곳에 배치되어 있어서 들어오는 신호를 검출하여 선정이 되지 않은 워드라인의 임피스던스는 낮게 하고 선정이 된 워드라인 임피던스는 높게 하는 랏치회로가 추가된 청구범위 제2항의 다이나믹형 MOS 메모리 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56096638A JPS57212690A (en) | 1981-06-24 | 1981-06-24 | Dynamic mos memory device |
JP56-96638 | 1981-06-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR840000941A true KR840000941A (ko) | 1984-03-26 |
Family
ID=14170365
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019820002748A KR840000941A (ko) | 1981-06-24 | 1982-06-19 | 다이나믹형 mos 메모리 장치 |
Country Status (9)
Country | Link |
---|---|
US (1) | US4476548A (ko) |
JP (1) | JPS57212690A (ko) |
KR (1) | KR840000941A (ko) |
DE (1) | DE3223599A1 (ko) |
FR (1) | FR2508688B1 (ko) |
GB (1) | GB2102645B (ko) |
HK (1) | HK45386A (ko) |
IT (1) | IT1151660B (ko) |
MY (1) | MY8600584A (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0750549B2 (ja) * | 1984-07-05 | 1995-05-31 | 三菱電機株式会社 | ダイナミック・ランダム・アクセス・メモリ |
NL8500434A (nl) * | 1985-02-15 | 1986-09-01 | Philips Nv | Geintegreerde geheugenschakeling met blokselektie. |
EP0210454B1 (en) * | 1985-07-01 | 1991-01-30 | Nec Corporation | Memory circuit with improved word line noise preventing circuits |
JPS6212997A (ja) * | 1985-07-10 | 1987-01-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPH0736269B2 (ja) * | 1985-08-30 | 1995-04-19 | 株式会社日立製作所 | 半導体記憶装置 |
US4710902A (en) * | 1985-10-04 | 1987-12-01 | Motorola, Inc. | Technique restore for a dynamic random access memory |
GB2187006B (en) * | 1986-02-25 | 1990-01-10 | Sony Corp | Random access memory apparatus |
US5379261A (en) * | 1993-03-26 | 1995-01-03 | United Memories, Inc. | Method and circuit for improved timing and noise margin in a DRAM |
DE10041688B4 (de) * | 2000-08-24 | 2008-03-27 | Infineon Technologies Ag | Integrierter Speicher mit Speicherzellen in mehreren Speicherzellenblöcken und Verfahren zum Betrieb eines solchen Speichers |
KR100546214B1 (ko) * | 2003-11-13 | 2006-01-24 | 주식회사 하이닉스반도체 | 반도체 소자의 데이터 및 데이터 스트로브 드라이버 스트랭쓰 제어 회로 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2366265C3 (de) * | 1972-05-16 | 1981-07-16 | Nippon Electric Co., Ltd., Tokyo | Pufferschaltung |
US3810124A (en) * | 1972-06-30 | 1974-05-07 | Ibm | Memory accessing system |
US3863230A (en) * | 1973-07-18 | 1975-01-28 | Intel Corp | MOS memory decoder circuit |
US3969706A (en) * | 1974-10-08 | 1976-07-13 | Mostek Corporation | Dynamic random access memory misfet integrated circuit |
JPS51147224A (en) * | 1975-06-13 | 1976-12-17 | Hitachi Ltd | Semiconductor memory |
DE2641693C2 (de) * | 1976-09-16 | 1978-11-16 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Decodierschaltung mit MOS-Transistoren |
JPS545337A (en) * | 1977-06-15 | 1979-01-16 | Hitachi Ltd | Semiconductor circuit |
DE2838004C3 (de) * | 1978-08-31 | 1981-10-29 | Siemens AG, 1000 Berlin und 8000 München | Decoderschaltung für dynamische Halbleiterspeicher |
DE2853523C2 (de) * | 1978-12-12 | 1981-10-01 | Ibm Deutschland Gmbh, 7000 Stuttgart | Dezentrale Erzeugung von Taktsteuersignalen |
DE2924526A1 (de) * | 1979-06-18 | 1981-01-08 | Siemens Ag | Monolithisch integrierter halbleiterspeicher |
-
1981
- 1981-06-24 JP JP56096638A patent/JPS57212690A/ja active Pending
-
1982
- 1982-06-07 US US06/386,067 patent/US4476548A/en not_active Expired - Fee Related
- 1982-06-18 FR FR828210661A patent/FR2508688B1/fr not_active Expired
- 1982-06-19 KR KR1019820002748A patent/KR840000941A/ko unknown
- 1982-06-23 IT IT22030/82A patent/IT1151660B/it active
- 1982-06-23 GB GB08218156A patent/GB2102645B/en not_active Expired
- 1982-06-24 DE DE19823223599 patent/DE3223599A1/de not_active Ceased
-
1986
- 1986-06-19 HK HK453/86A patent/HK45386A/xx unknown
- 1986-12-30 MY MY584/86A patent/MY8600584A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
US4476548A (en) | 1984-10-09 |
GB2102645A (en) | 1983-02-02 |
FR2508688B1 (fr) | 1989-03-17 |
GB2102645B (en) | 1985-03-06 |
HK45386A (en) | 1986-06-27 |
IT8222030A0 (it) | 1982-06-23 |
IT1151660B (it) | 1986-12-24 |
MY8600584A (en) | 1986-12-31 |
FR2508688A1 (fr) | 1982-12-31 |
JPS57212690A (en) | 1982-12-27 |
DE3223599A1 (de) | 1983-01-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR850700193A (ko) | 다 레벨입력전압 수신용 입력버퍼회로 | |
KR920008768A (ko) | 반도체기억장치 | |
KR950006850A (ko) | 선택기 회로 | |
KR850002637A (ko) | 반도체 기억장치 | |
KR850000125A (ko) | Mos 기억장치 | |
KR850004855A (ko) | 반도체 메모리 장치 | |
KR860000659A (ko) | M0s 스태틱형 ram | |
KR880010423A (ko) | 반도체 기억장치 | |
KR880001109A (ko) | 집적논리회로 | |
KR880004478A (ko) | 반도체 기억장치 | |
KR930020695A (ko) | 반도체 기억장치 | |
KR850003611A (ko) | 반도체 기억장치의 메모리 셀(cell) 캐패시터 전압인가회로 | |
KR880009376A (ko) | 반도체 기억장치 | |
KR880013172A (ko) | 반도체 메모리 | |
KR840000941A (ko) | 다이나믹형 mos 메모리 장치 | |
KR860008559A (ko) | 반도체 기억장치 | |
KR890005992A (ko) | 상보신호 출력회로 | |
KR850700197A (ko) | 변환기 회로 | |
KR960027258A (ko) | 차동 증폭 회로, cmos 인버터, 펄스폭 변조용 복조 회로 및 샘플링 회로 | |
KR970062925A (ko) | 외부 장치와 인터페이스하는 저 전력 데이터 처리 시스템 및 그것을 위한 방법 | |
KR870008320A (ko) | 상이형 메모리셀로 구성되는 반도체 메모리장치 | |
KR850003045A (ko) | 라인 절환 회로 및 그를 사용한 반도체 메모리 | |
KR840005888A (ko) | 반도체 기억장치(半導體記憶置裝) | |
KR880008336A (ko) | 반도체 집적회로 장치 | |
KR910020731A (ko) | 반도체장치 및 그 번인방법 |