KR830009518A - 병렬처리용(竝列處理用)데이터 처리 시스템 - Google Patents

병렬처리용(竝列處理用)데이터 처리 시스템 Download PDF

Info

Publication number
KR830009518A
KR830009518A KR1019820001002A KR820001002A KR830009518A KR 830009518 A KR830009518 A KR 830009518A KR 1019820001002 A KR1019820001002 A KR 1019820001002A KR 820001002 A KR820001002 A KR 820001002A KR 830009518 A KR830009518 A KR 830009518A
Authority
KR
South Korea
Prior art keywords
processing
data
parallel
processing system
data processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019820001002A
Other languages
English (en)
Other versions
KR860001274B1 (ko
Inventor
가즈시 사까모도
데쓰로 오까모도
시게아끼 오꾸다니
Original Assignee
야마모도 다꾸마
후지쑤 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 야마모도 다꾸마, 후지쑤 가부시끼 가이샤 filed Critical 야마모도 다꾸마
Publication of KR830009518A publication Critical patent/KR830009518A/ko
Application granted granted Critical
Publication of KR860001274B1 publication Critical patent/KR860001274B1/ko
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)

Abstract

내용 없음

Description

병렬처리용(列處理用)데이터 처리 시스템
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 의한 백터 처리장치의 블록선도

Claims (5)

  1. 상이한 명령을 각각 실행하는 복수의 처리부 및 국부적인 정보기억장치로부터 정보제공 피연산함수 데이터를 독출하며 국부적인 기억장치속으로 결과 피연산함수 데이터를 기억하도록 하는 최소한 두가지 단계를 포함하는 복수의 관리부로 구성되며 관리부의 각각의 장치가 상이한 명령을 병령처리할 수 있도록 한 병렬처리용 데이터 처리 시스템.
  2. 청구범위 제1항에 있어서 각 단계를 명령 번지와 피연산함수 번지의 처리코우드를 유지하는 레지스터로 구성한 병렬처리용 데이터 처리 시스템.
  3. 청구범위 제2항에 있어서 각 관리부의 장치가 각 처리장치에 해당하도록 한 병렬처리용 데이터 처리 시스템.
  4. 청구범위 제2항에 있어서 관리부 중의 최한한 한가지 장치를 처리부중의 최소한 두가지 장치에 대하여 보편적으로 사용되게한 병렬처리용 데이터처리 시스템.
  5. 상이한 명령을 각각 실행하는 복수의 처리부와 피연산함수 데이터를 기억하는 국부적인 기억장치로 시스템을 구성함에 있어서 명령을 유지하여 처리부중의 한가지를 제어하는 복수의 관리수단과 미리 설정된 타이밍을 순차로 지시하는 타이밍 신호를 발생하며 국부적인 기억장치로 도달할 수 있게끔 한가지 이상의 특수한 관리수단에 대해 각각의 타이밍을 부여한 타이밍 신호 발생기와 주어진 명령, 관리수단에서 오는 작동진행중 신호 및 타이밍 신호에 따라 관리 수단중의 한개를 선택하는 제어선택 논리회로 구성한 병령처리용 데이터 처리시스템.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR8201002A 1981-03-20 1982-03-09 병렬처리용 데이터 처리 시스템 Expired KR860001274B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP56039536A JPS57155666A (en) 1981-03-20 1981-03-20 Instruction controlling system of vector processor
JP56-039536 1981-03-20

Publications (2)

Publication Number Publication Date
KR830009518A true KR830009518A (ko) 1983-12-21
KR860001274B1 KR860001274B1 (ko) 1986-09-04

Family

ID=12555764

Family Applications (1)

Application Number Title Priority Date Filing Date
KR8201002A Expired KR860001274B1 (ko) 1981-03-20 1982-03-09 병렬처리용 데이터 처리 시스템

Country Status (9)

Country Link
US (1) US4507728A (ko)
EP (1) EP0061096B1 (ko)
JP (1) JPS57155666A (ko)
KR (1) KR860001274B1 (ko)
AU (1) AU538595B2 (ko)
BR (1) BR8201533A (ko)
CA (1) CA1176757A (ko)
DE (1) DE3262186D1 (ko)
ES (1) ES510535A0 (ko)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58134357A (ja) * 1982-02-03 1983-08-10 Hitachi Ltd ベクトルプロセッサ
JPS58189738A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
US4901230A (en) * 1983-04-25 1990-02-13 Cray Research, Inc. Computer vector multiprocessing control with multiple access memory and priority conflict resolution method
US4636942A (en) * 1983-04-25 1987-01-13 Cray Research, Inc. Computer vector multiprocessing control
US4661900A (en) * 1983-04-25 1987-04-28 Cray Research, Inc. Flexible chaining in vector processor with selective use of vector registers as operand and result registers
US4589067A (en) * 1983-05-27 1986-05-13 Analogic Corporation Full floating point vector processor with dynamically configurable multifunction pipelined ALU
JPS6015771A (ja) * 1983-07-08 1985-01-26 Hitachi Ltd ベクトルプロセッサ
JPS6072069A (ja) * 1983-09-28 1985-04-24 Nec Corp ベクトル演算処理装置
JPS60101644A (ja) * 1983-11-07 1985-06-05 Masahiro Sowa ノイマン型コンピュータプログラムを実行するコントロールフローコンピュータ
JPS60134974A (ja) * 1983-12-23 1985-07-18 Hitachi Ltd ベクトル処理装置
JPS60136875A (ja) * 1983-12-26 1985-07-20 Hitachi Ltd ベクトル演算器
JPS60136870A (ja) * 1983-12-26 1985-07-20 Hitachi Ltd ベクトル処理装置
JPS60239871A (ja) * 1984-05-14 1985-11-28 Nec Corp ベクトルデ−タ処理装置
US4809171A (en) * 1984-06-20 1989-02-28 Convex Computer Corporation Concurrent processing of data operands
US4766564A (en) * 1984-08-13 1988-08-23 International Business Machines Corporation Dual putaway/bypass busses for multiple arithmetic units
JPH0769818B2 (ja) * 1984-10-31 1995-07-31 株式会社日立製作所 デ−タ処理装置
JPS61110256A (ja) * 1984-11-02 1986-05-28 Hitachi Ltd 複数の演算部を有するプロセツサ
EP0184791A1 (en) * 1984-12-07 1986-06-18 Nec Corporation Information processing device capable of rapidly processing instructions of different groups
US4933835A (en) * 1985-02-22 1990-06-12 Intergraph Corporation Apparatus for maintaining consistency of a cache memory with a primary memory
US5255384A (en) * 1985-02-22 1993-10-19 Intergraph Corporation Memory address translation system having modifiable and non-modifiable translation mechanisms
US4860192A (en) * 1985-02-22 1989-08-22 Intergraph Corporation Quadword boundary cache system
US4899275A (en) * 1985-02-22 1990-02-06 Intergraph Corporation Cache-MMU system
JPS621067A (ja) * 1985-02-25 1987-01-07 Hitachi Ltd ベクトル処理装置
JPS61202281A (ja) * 1985-03-05 1986-09-08 Fujitsu Ltd パイプライン制御方式
JPH0766329B2 (ja) * 1985-06-14 1995-07-19 株式会社日立製作所 情報処理装置
EP0205193B1 (en) * 1985-06-17 1996-10-23 Nec Corporation Information processing system comprising a register renewal waiting control circuit with renewal register number registering means
US4754398A (en) * 1985-06-28 1988-06-28 Cray Research, Inc. System for multiprocessor communication using local and common semaphore and information registers
US4745545A (en) * 1985-06-28 1988-05-17 Cray Research, Inc. Memory reference control in a multiprocessor
US4873630A (en) * 1985-07-31 1989-10-10 Unisys Corporation Scientific processor to support a host processor referencing common memory
JPH0743648B2 (ja) * 1985-11-15 1995-05-15 株式会社日立製作所 情報処理装置
JPS62120574A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd ベクトル処理装置
US4839845A (en) * 1986-03-31 1989-06-13 Unisys Corporation Method and apparatus for performing a vector reduction
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US4811214A (en) * 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
JPS63131230A (ja) * 1986-11-21 1988-06-03 Hitachi Ltd 情報処理装置
US4891753A (en) * 1986-11-26 1990-01-02 Intel Corporation Register scorboarding on a microprocessor chip
JPH0810430B2 (ja) * 1986-11-28 1996-01-31 株式会社日立製作所 情報処理装置
JP2695157B2 (ja) * 1986-12-29 1997-12-24 松下電器産業株式会社 可変パイプラインプロセッサ
NL8700530A (nl) * 1987-03-05 1988-10-03 Philips Nv Pijplijnsysteem met parallelle data-beschrijving.
US4792894A (en) * 1987-03-17 1988-12-20 Unisys Corporation Arithmetic computation modifier based upon data dependent operations for SIMD architectures
JPS63200142U (ko) * 1987-06-05 1988-12-23
US4901267A (en) * 1988-03-14 1990-02-13 Weitek Corporation Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio
DE68928113T2 (de) * 1988-04-01 1997-10-09 Nippon Electric Co Reihenfolgesteuersystem zur Behandlung von Befehlen
EP0346031B1 (en) * 1988-06-07 1997-12-29 Fujitsu Limited Vector data processing apparatus
JPH06105460B2 (ja) * 1988-06-07 1994-12-21 富士通株式会社 マルチプロセッサのプロセッサ切換え装置
GB8817911D0 (en) * 1988-07-27 1988-09-01 Int Computers Ltd Data processing apparatus
US5142638A (en) * 1989-02-07 1992-08-25 Cray Research, Inc. Apparatus for sharing memory in a multiprocessor system
US5185880A (en) * 1989-06-05 1993-02-09 Matsushita Electric Industrial Co., Ltd. Stored instructions executing type timing signal generating system
US5203002A (en) * 1989-12-27 1993-04-13 Wetzel Glen F System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5363495A (en) * 1991-08-26 1994-11-08 International Business Machines Corporation Data processing system with multiple execution units capable of executing instructions out of sequence
US5420815A (en) * 1991-10-29 1995-05-30 Advanced Micro Devices, Inc. Digital multiplication and accumulation system
EP0540175B1 (en) * 1991-10-29 1999-05-19 Advanced Micro Devices, Inc. Digital signal processing apparatus
JPH0821833B2 (ja) * 1992-07-28 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション ディジタルオーディオ情報をフィルタする回路及びフィルタされたディジタル信号を生成する方法
US5579527A (en) * 1992-08-05 1996-11-26 David Sarnoff Research Center Apparatus for alternately activating a multiplier and a match unit
US5509129A (en) * 1993-11-30 1996-04-16 Guttag; Karl M. Long instruction word controlling plural independent processor operations
AU2243995A (en) * 1994-04-07 1995-10-30 Media Vision, Inc. Musical instrument simulation processor
US5465336A (en) * 1994-06-30 1995-11-07 International Business Machines Corporation Fetch and store buffer that enables out-of-order execution of memory instructions in a data processing system
US5706489A (en) * 1995-10-18 1998-01-06 International Business Machines Corporation Method for a CPU to utilize a parallel instruction execution processing facility for assisting in the processing of the accessed data
US6226706B1 (en) 1997-12-29 2001-05-01 Samsung Electronics Co., Ltd. Rotation bus interface coupling processor buses to memory buses for interprocessor communication via exclusive memory access
US7509486B1 (en) * 1999-07-08 2009-03-24 Broadcom Corporation Encryption processor for performing accelerated computations to establish secure network sessions connections
ATE390788T1 (de) * 1999-10-14 2008-04-15 Bluearc Uk Ltd Vorrichtung und verfahren zur hardware-ausführung oder hardware-beschleunigung von betriebssystemfunktionen
US7149878B1 (en) * 2000-10-30 2006-12-12 Mips Technologies, Inc. Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register values
US7711926B2 (en) * 2001-04-18 2010-05-04 Mips Technologies, Inc. Mapping system and method for instruction set processing
US6826681B2 (en) * 2001-06-18 2004-11-30 Mips Technologies, Inc. Instruction specified register value saving in allocated caller stack or not yet allocated callee stack
US7107439B2 (en) 2001-08-10 2006-09-12 Mips Technologies, Inc. System and method of controlling software decompression through exceptions
US7457822B1 (en) * 2002-11-01 2008-11-25 Bluearc Uk Limited Apparatus and method for hardware-based file system
US8041735B1 (en) 2002-11-01 2011-10-18 Bluearc Uk Limited Distributed file system and method
KR20190132741A (ko) 2018-05-21 2019-11-29 삼성중공업 주식회사 부유식 구조물의 스키드 장치
CN113762518B (zh) * 2020-06-02 2024-07-12 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质
CN111783969A (zh) * 2020-06-30 2020-10-16 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3229260A (en) * 1962-03-02 1966-01-11 Ibm Multiprocessing computer system
AT335202B (de) * 1973-08-13 1977-02-25 Ibm Oesterreich Datenverarbeitungsanlage zur parallelen ausfuhrung von verarbeitungsoperationen
SE7505552L (sv) * 1975-05-14 1976-11-15 Ellemtel Utvecklings Ab Sett och anordning att efter varandra avverka databehandlingsinstruktioner i funktionsenheter hos en datamaskin
US4229790A (en) * 1978-10-16 1980-10-21 Denelcor, Inc. Concurrent task and instruction processor and method

Also Published As

Publication number Publication date
ES8303743A1 (es) 1983-02-01
AU8161482A (en) 1982-09-23
US4507728A (en) 1985-03-26
BR8201533A (pt) 1983-02-08
EP0061096A1 (en) 1982-09-29
AU538595B2 (en) 1984-08-23
CA1176757A (en) 1984-10-23
JPS57155666A (en) 1982-09-25
ES510535A0 (es) 1983-02-01
JPS6161436B2 (ko) 1986-12-25
DE3262186D1 (en) 1985-03-21
EP0061096B1 (en) 1985-02-06
KR860001274B1 (ko) 1986-09-04

Similar Documents

Publication Publication Date Title
KR830009518A (ko) 병렬처리용(竝列處理用)데이터 처리 시스템
KR870004366A (ko) 데이터 처리 시스템
KR910001555A (ko) 데이타 프로세서
JPS6436336A (en) Calculator system
KR930002961A (ko) 멀티프로세서 파이프라인에 걸리는 프로세싱 로드를 동적으로 균형시키기 위해 높은 레벨의 명령신호를 프로세싱하는 장치 및 방법
KR920022117A (ko) 메모리 억세스 장치
KR960700475A (ko) 명령어 실행 제어를 위해 명령어에 태그를 할당하는 시스템 및 방법
KR930002930A (ko) 고속 병렬 마이크로코드 프로그램 제어기
KR850002907A (ko) Cpu 마이크로 분기구조
KR870011615A (ko) 부분 서입 제어장치
KR930700907A (ko) 스톨캐쉬를 제공하기 위한 장치 및 방법
KR910012955A (ko) 데이타 처리 시스템
KR910001565A (ko) 멀티프로세서 시스템
KR830010423A (ko) 데이터 처리 시스템의 데이터 교환방식
KR900018807A (ko) 마이크로 명령수식 기능을 가진 제어장치
KR910017295A (ko) 정보처리장치
MX171149B (es) Aparato y metodo substitucion de un cuadro de pagina en un sistema de procesamiento de datos que tiene un direccionamiento de memoria virtual
JPS5779555A (en) Advanced control system for instruction
KR860009421A (ko) 논리기능을 가진 기억회로
KR890005607A (ko) 데이타 처리 시스템
KR890004238A (ko) 순차접근 기억장치
KR960018958A (ko) 다중 프로세서 시스템에서 아토믹 명령어 수행시 데이타 버퍼를 사용한 메인 메모리 액세스 장치
KR920000027A (ko) 제1프로그램 응용간의 포커스 시프팅 방법 및 시스템
JPS56162151A (en) Information processing device
JPS56124954A (en) Advance control type information processing equipment

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1605 Publication of application before grant of patent

St.27 status event code: A-2-2-Q10-Q13-nap-PG1605

PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

Fee payment year number: 1

St.27 status event code: A-2-2-U10-U11-oth-PR1002

PR1001 Payment of annual fee

Fee payment year number: 4

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 5

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 6

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 7

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 8

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 9

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 10

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 11

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 12

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PR1001 Payment of annual fee

Fee payment year number: 13

St.27 status event code: A-4-4-U10-U11-oth-PR1001

PC1903 Unpaid annual fee

Not in force date: 19990905

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

St.27 status event code: A-4-4-U10-U13-oth-PC1903

PC1903 Unpaid annual fee

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 19990905

St.27 status event code: N-4-6-H10-H13-oth-PC1903

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

St.27 status event code: A-5-5-R10-R13-asn-PN2301

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000