DE3262186D1 - Data processing system for parallel processing - Google Patents

Data processing system for parallel processing

Info

Publication number
DE3262186D1
DE3262186D1 DE8282102010T DE3262186T DE3262186D1 DE 3262186 D1 DE3262186 D1 DE 3262186D1 DE 8282102010 T DE8282102010 T DE 8282102010T DE 3262186 T DE3262186 T DE 3262186T DE 3262186 D1 DE3262186 D1 DE 3262186D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
parallel
parallel processing
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282102010T
Other languages
English (en)
Inventor
Kazushi Sakamoto
Tetsuro Okamoto
Shigeaki Okutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3262186D1 publication Critical patent/DE3262186D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
DE8282102010T 1981-03-20 1982-03-12 Data processing system for parallel processing Expired DE3262186D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56039536A JPS57155666A (en) 1981-03-20 1981-03-20 Instruction controlling system of vector processor

Publications (1)

Publication Number Publication Date
DE3262186D1 true DE3262186D1 (en) 1985-03-21

Family

ID=12555764

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282102010T Expired DE3262186D1 (en) 1981-03-20 1982-03-12 Data processing system for parallel processing

Country Status (9)

Country Link
US (1) US4507728A (de)
EP (1) EP0061096B1 (de)
JP (1) JPS57155666A (de)
KR (1) KR860001274B1 (de)
AU (1) AU538595B2 (de)
BR (1) BR8201533A (de)
CA (1) CA1176757A (de)
DE (1) DE3262186D1 (de)
ES (1) ES8303743A1 (de)

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JPH0769818B2 (ja) * 1984-10-31 1995-07-31 株式会社日立製作所 デ−タ処理装置
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JPH0766329B2 (ja) * 1985-06-14 1995-07-19 株式会社日立製作所 情報処理装置
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JPH0743648B2 (ja) * 1985-11-15 1995-05-15 株式会社日立製作所 情報処理装置
JPS62120574A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd ベクトル処理装置
US4839845A (en) * 1986-03-31 1989-06-13 Unisys Corporation Method and apparatus for performing a vector reduction
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US4811214A (en) * 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
JPS63131230A (ja) * 1986-11-21 1988-06-03 Hitachi Ltd 情報処理装置
US4891753A (en) * 1986-11-26 1990-01-02 Intel Corporation Register scorboarding on a microprocessor chip
JPH0810430B2 (ja) * 1986-11-28 1996-01-31 株式会社日立製作所 情報処理装置
JP2695157B2 (ja) * 1986-12-29 1997-12-24 松下電器産業株式会社 可変パイプラインプロセッサ
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US4792894A (en) * 1987-03-17 1988-12-20 Unisys Corporation Arithmetic computation modifier based upon data dependent operations for SIMD architectures
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DE68928113T2 (de) * 1988-04-01 1997-10-09 Nec Corp Reihenfolgesteuersystem zur Behandlung von Befehlen
EP0346031B1 (de) * 1988-06-07 1997-12-29 Fujitsu Limited Vektordatenverarbeitungsvorrichtung
JPH06105460B2 (ja) * 1988-06-07 1994-12-21 富士通株式会社 マルチプロセッサのプロセッサ切換え装置
GB8817911D0 (en) * 1988-07-27 1988-09-01 Int Computers Ltd Data processing apparatus
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US5185880A (en) * 1989-06-05 1993-02-09 Matsushita Electric Industrial Co., Ltd. Stored instructions executing type timing signal generating system
US5203002A (en) * 1989-12-27 1993-04-13 Wetzel Glen F System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5363495A (en) * 1991-08-26 1994-11-08 International Business Machines Corporation Data processing system with multiple execution units capable of executing instructions out of sequence
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US5420815A (en) * 1991-10-29 1995-05-30 Advanced Micro Devices, Inc. Digital multiplication and accumulation system
JPH0821833B2 (ja) * 1992-07-28 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション ディジタルオーディオ情報をフィルタする回路及びフィルタされたディジタル信号を生成する方法
US5579527A (en) * 1992-08-05 1996-11-26 David Sarnoff Research Center Apparatus for alternately activating a multiplier and a match unit
US5509129A (en) * 1993-11-30 1996-04-16 Guttag; Karl M. Long instruction word controlling plural independent processor operations
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US5706489A (en) * 1995-10-18 1998-01-06 International Business Machines Corporation Method for a CPU to utilize a parallel instruction execution processing facility for assisting in the processing of the accessed data
US6226706B1 (en) 1997-12-29 2001-05-01 Samsung Electronics Co., Ltd. Rotation bus interface coupling processor buses to memory buses for interprocessor communication via exclusive memory access
US7509486B1 (en) * 1999-07-08 2009-03-24 Broadcom Corporation Encryption processor for performing accelerated computations to establish secure network sessions connections
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US7149878B1 (en) * 2000-10-30 2006-12-12 Mips Technologies, Inc. Changing instruction set architecture mode by comparison of current instruction execution address with boundary address register values
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US7457822B1 (en) * 2002-11-01 2008-11-25 Bluearc Uk Limited Apparatus and method for hardware-based file system
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KR20190132741A (ko) 2018-05-21 2019-11-29 삼성중공업 주식회사 부유식 구조물의 스키드 장치
CN113762518A (zh) * 2020-06-02 2021-12-07 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质
CN111783969A (zh) * 2020-06-30 2020-10-16 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质

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AT335202B (de) * 1973-08-13 1977-02-25 Ibm Oesterreich Datenverarbeitungsanlage zur parallelen ausfuhrung von verarbeitungsoperationen
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Also Published As

Publication number Publication date
KR830009518A (ko) 1983-12-21
KR860001274B1 (ko) 1986-09-04
EP0061096A1 (de) 1982-09-29
AU8161482A (en) 1982-09-23
ES510535A0 (es) 1983-02-01
BR8201533A (pt) 1983-02-08
AU538595B2 (en) 1984-08-23
ES8303743A1 (es) 1983-02-01
CA1176757A (en) 1984-10-23
JPS57155666A (en) 1982-09-25
JPS6161436B2 (de) 1986-12-25
US4507728A (en) 1985-03-26
EP0061096B1 (de) 1985-02-06

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee