BR8201533A - Sistema de processamento de dados para tratamento simultaneo(ou multiprocessamento) - Google Patents

Sistema de processamento de dados para tratamento simultaneo(ou multiprocessamento)

Info

Publication number
BR8201533A
BR8201533A BR8201533A BR8201533A BR8201533A BR 8201533 A BR8201533 A BR 8201533A BR 8201533 A BR8201533 A BR 8201533A BR 8201533 A BR8201533 A BR 8201533A BR 8201533 A BR8201533 A BR 8201533A
Authority
BR
Brazil
Prior art keywords
multiprocessing
simultaneous
treatment
data processing
processing system
Prior art date
Application number
BR8201533A
Other languages
English (en)
Inventor
Sakamoto Kazushi
Okamoto Tetsuro
Oktani Shigeaki
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of BR8201533A publication Critical patent/BR8201533A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
BR8201533A 1981-03-20 1982-03-19 Sistema de processamento de dados para tratamento simultaneo(ou multiprocessamento) BR8201533A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56039536A JPS57155666A (en) 1981-03-20 1981-03-20 Instruction controlling system of vector processor

Publications (1)

Publication Number Publication Date
BR8201533A true BR8201533A (pt) 1983-02-08

Family

ID=12555764

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8201533A BR8201533A (pt) 1981-03-20 1982-03-19 Sistema de processamento de dados para tratamento simultaneo(ou multiprocessamento)

Country Status (9)

Country Link
US (1) US4507728A (pt)
EP (1) EP0061096B1 (pt)
JP (1) JPS57155666A (pt)
KR (1) KR860001274B1 (pt)
AU (1) AU538595B2 (pt)
BR (1) BR8201533A (pt)
CA (1) CA1176757A (pt)
DE (1) DE3262186D1 (pt)
ES (1) ES510535A0 (pt)

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JPS60136870A (ja) * 1983-12-26 1985-07-20 Hitachi Ltd ベクトル処理装置
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US4809171A (en) * 1984-06-20 1989-02-28 Convex Computer Corporation Concurrent processing of data operands
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JPH0769818B2 (ja) * 1984-10-31 1995-07-31 株式会社日立製作所 デ−タ処理装置
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US4933835A (en) * 1985-02-22 1990-06-12 Intergraph Corporation Apparatus for maintaining consistency of a cache memory with a primary memory
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US4860192A (en) * 1985-02-22 1989-08-22 Intergraph Corporation Quadword boundary cache system
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JPS61202281A (ja) * 1985-03-05 1986-09-08 Fujitsu Ltd パイプライン制御方式
JPH0766329B2 (ja) * 1985-06-14 1995-07-19 株式会社日立製作所 情報処理装置
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US4873630A (en) * 1985-07-31 1989-10-10 Unisys Corporation Scientific processor to support a host processor referencing common memory
JPH0743648B2 (ja) * 1985-11-15 1995-05-15 株式会社日立製作所 情報処理装置
JPS62120574A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd ベクトル処理装置
US4839845A (en) * 1986-03-31 1989-06-13 Unisys Corporation Method and apparatus for performing a vector reduction
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US4811214A (en) * 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
JPS63131230A (ja) * 1986-11-21 1988-06-03 Hitachi Ltd 情報処理装置
US4891753A (en) * 1986-11-26 1990-01-02 Intel Corporation Register scorboarding on a microprocessor chip
JPH0810430B2 (ja) * 1986-11-28 1996-01-31 株式会社日立製作所 情報処理装置
JP2695157B2 (ja) * 1986-12-29 1997-12-24 松下電器産業株式会社 可変パイプラインプロセッサ
NL8700530A (nl) * 1987-03-05 1988-10-03 Philips Nv Pijplijnsysteem met parallelle data-beschrijving.
US4792894A (en) * 1987-03-17 1988-12-20 Unisys Corporation Arithmetic computation modifier based upon data dependent operations for SIMD architectures
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US4901267A (en) * 1988-03-14 1990-02-13 Weitek Corporation Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio
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JPH06105460B2 (ja) * 1988-06-07 1994-12-21 富士通株式会社 マルチプロセッサのプロセッサ切換え装置
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US5203002A (en) * 1989-12-27 1993-04-13 Wetzel Glen F System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5539911A (en) * 1991-07-08 1996-07-23 Seiko Epson Corporation High-performance, superscalar-based computer system with out-of-order instruction execution
US5363495A (en) * 1991-08-26 1994-11-08 International Business Machines Corporation Data processing system with multiple execution units capable of executing instructions out of sequence
ATE180339T1 (de) * 1991-10-29 1999-06-15 Advanced Micro Devices Inc Datensignalverarbeitungsgerät
US5420815A (en) * 1991-10-29 1995-05-30 Advanced Micro Devices, Inc. Digital multiplication and accumulation system
JPH0821833B2 (ja) * 1992-07-28 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション ディジタルオーディオ情報をフィルタする回路及びフィルタされたディジタル信号を生成する方法
US5579527A (en) * 1992-08-05 1996-11-26 David Sarnoff Research Center Apparatus for alternately activating a multiplier and a match unit
US5509129A (en) * 1993-11-30 1996-04-16 Guttag; Karl M. Long instruction word controlling plural independent processor operations
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US5465336A (en) * 1994-06-30 1995-11-07 International Business Machines Corporation Fetch and store buffer that enables out-of-order execution of memory instructions in a data processing system
US5706489A (en) * 1995-10-18 1998-01-06 International Business Machines Corporation Method for a CPU to utilize a parallel instruction execution processing facility for assisting in the processing of the accessed data
US6226706B1 (en) 1997-12-29 2001-05-01 Samsung Electronics Co., Ltd. Rotation bus interface coupling processor buses to memory buses for interprocessor communication via exclusive memory access
US7509486B1 (en) * 1999-07-08 2009-03-24 Broadcom Corporation Encryption processor for performing accelerated computations to establish secure network sessions connections
EP1912124B8 (en) * 1999-10-14 2013-01-09 Bluearc UK Limited Apparatus and system for implementation of service functions
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US7711926B2 (en) * 2001-04-18 2010-05-04 Mips Technologies, Inc. Mapping system and method for instruction set processing
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US7107439B2 (en) 2001-08-10 2006-09-12 Mips Technologies, Inc. System and method of controlling software decompression through exceptions
US7457822B1 (en) * 2002-11-01 2008-11-25 Bluearc Uk Limited Apparatus and method for hardware-based file system
US8041735B1 (en) 2002-11-01 2011-10-18 Bluearc Uk Limited Distributed file system and method
KR20190132741A (ko) 2018-05-21 2019-11-29 삼성중공업 주식회사 부유식 구조물의 스키드 장치
CN113762518B (zh) * 2020-06-02 2024-07-12 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质
CN111783969A (zh) * 2020-06-30 2020-10-16 中科寒武纪科技股份有限公司 数据处理方法、装置、计算机设备和存储介质

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US3229260A (en) * 1962-03-02 1966-01-11 Ibm Multiprocessing computer system
AT335202B (de) * 1973-08-13 1977-02-25 Ibm Oesterreich Datenverarbeitungsanlage zur parallelen ausfuhrung von verarbeitungsoperationen
SE7505552L (sv) * 1975-05-14 1976-11-15 Ellemtel Utvecklings Ab Sett och anordning att efter varandra avverka databehandlingsinstruktioner i funktionsenheter hos en datamaskin
US4229790A (en) * 1978-10-16 1980-10-21 Denelcor, Inc. Concurrent task and instruction processor and method

Also Published As

Publication number Publication date
KR830009518A (ko) 1983-12-21
CA1176757A (en) 1984-10-23
EP0061096A1 (en) 1982-09-29
KR860001274B1 (ko) 1986-09-04
JPS57155666A (en) 1982-09-25
ES8303743A1 (es) 1983-02-01
DE3262186D1 (en) 1985-03-21
EP0061096B1 (en) 1985-02-06
AU8161482A (en) 1982-09-23
ES510535A0 (es) 1983-02-01
AU538595B2 (en) 1984-08-23
JPS6161436B2 (pt) 1986-12-25
US4507728A (en) 1985-03-26

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Legal Events

Date Code Title Description
MM Lapse due to non-payment of fees (art. 50)
B15K Others concerning applications: alteration of classification

Ipc: G06F 15/80 (2006.01), G06F 9/30 (2018.0