KR20140051463A - 서라운딩 게이트를 구비한 나노선 트랜지스터 - Google Patents
서라운딩 게이트를 구비한 나노선 트랜지스터 Download PDFInfo
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- KR20140051463A KR20140051463A KR1020147009477A KR20147009477A KR20140051463A KR 20140051463 A KR20140051463 A KR 20140051463A KR 1020147009477 A KR1020147009477 A KR 1020147009477A KR 20147009477 A KR20147009477 A KR 20147009477A KR 20140051463 A KR20140051463 A KR 20140051463A
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- 239000002070 nanowire Substances 0.000 title description 42
- 239000004065 semiconductor Substances 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 22
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- 239000012212 insulator Substances 0.000 abstract description 17
- 238000000348 solid-phase epitaxy Methods 0.000 abstract description 7
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- 229910052710 silicon Inorganic materials 0.000 description 15
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 230000005684 electric field Effects 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- SDGKUVSVPIIUCF-UHFFFAOYSA-N 2,6-dimethylpiperidine Chemical compound CC1CCCC(C)N1 SDGKUVSVPIIUCF-UHFFFAOYSA-N 0.000 description 3
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/231—Tunnel BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/63—Vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6728—Vertical TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
- H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Electrodes Of Semiconductors (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (11)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/397,413 | 2006-04-04 | ||
| US11/397,358 | 2006-04-04 | ||
| US11/397,430 | 2006-04-04 | ||
| US11/397,406 | 2006-04-04 | ||
| US11/397,527 US7425491B2 (en) | 2006-04-04 | 2006-04-04 | Nanowire transistor with surrounding gate |
| US11/397,430 US8734583B2 (en) | 2006-04-04 | 2006-04-04 | Grown nanofin transistors |
| US11/397,406 US20070228491A1 (en) | 2006-04-04 | 2006-04-04 | Tunneling transistor with sublithographic channel |
| US11/397,413 US7491995B2 (en) | 2006-04-04 | 2006-04-04 | DRAM with nanofin transistors |
| US11/397,527 | 2006-04-04 | ||
| US11/397,358 US8354311B2 (en) | 2006-04-04 | 2006-04-04 | Method for forming nanofin transistors |
| PCT/US2007/008123 WO2007120492A1 (en) | 2006-04-04 | 2007-04-03 | Nanowire transistor with surrounding gate |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020087027075A Division KR20090006169A (ko) | 2006-04-04 | 2007-04-03 | 서라운딩 게이트를 구비한 나노선 트랜지스터 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20140051463A true KR20140051463A (ko) | 2014-04-30 |
Family
ID=38325217
Family Applications (5)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020147009477A Ceased KR20140051463A (ko) | 2006-04-04 | 2007-04-03 | 서라운딩 게이트를 구비한 나노선 트랜지스터 |
| KR1020087026970A Withdrawn KR20090007393A (ko) | 2006-04-04 | 2007-04-03 | 나노핀 터널링 트랜지스터 |
| KR1020087027075A Ceased KR20090006169A (ko) | 2006-04-04 | 2007-04-03 | 서라운딩 게이트를 구비한 나노선 트랜지스터 |
| KR1020087026973A Active KR101474028B1 (ko) | 2006-04-04 | 2008-11-03 | 에칭된 나노핀 트랜지스터 |
| KR1020087027077A Active KR101378256B1 (ko) | 2006-04-04 | 2008-11-04 | 성장형 나노핀 트랜지스터 |
Family Applications After (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020087026970A Withdrawn KR20090007393A (ko) | 2006-04-04 | 2007-04-03 | 나노핀 터널링 트랜지스터 |
| KR1020087027075A Ceased KR20090006169A (ko) | 2006-04-04 | 2007-04-03 | 서라운딩 게이트를 구비한 나노선 트랜지스터 |
| KR1020087026973A Active KR101474028B1 (ko) | 2006-04-04 | 2008-11-03 | 에칭된 나노핀 트랜지스터 |
| KR1020087027077A Active KR101378256B1 (ko) | 2006-04-04 | 2008-11-04 | 성장형 나노핀 트랜지스터 |
Country Status (5)
| Country | Link |
|---|---|
| EP (4) | EP2008309A1 (enExample) |
| JP (4) | JP5229635B2 (enExample) |
| KR (5) | KR20140051463A (enExample) |
| SG (2) | SG172643A1 (enExample) |
| WO (4) | WO2007120493A1 (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100790863B1 (ko) * | 2005-12-28 | 2008-01-03 | 삼성전자주식회사 | 나노 와이어 제조 방법 |
| US7491995B2 (en) | 2006-04-04 | 2009-02-17 | Micron Technology, Inc. | DRAM with nanofin transistors |
| US8734583B2 (en) | 2006-04-04 | 2014-05-27 | Micron Technology, Inc. | Grown nanofin transistors |
| US7425491B2 (en) | 2006-04-04 | 2008-09-16 | Micron Technology, Inc. | Nanowire transistor with surrounding gate |
| US8354311B2 (en) | 2006-04-04 | 2013-01-15 | Micron Technology, Inc. | Method for forming nanofin transistors |
| US8643087B2 (en) * | 2006-09-20 | 2014-02-04 | Micron Technology, Inc. | Reduced leakage memory cells |
| KR100945511B1 (ko) * | 2008-04-10 | 2010-03-09 | 주식회사 하이닉스반도체 | 반도체 소자 및 그의 제조방법 |
| US7897494B2 (en) * | 2008-06-24 | 2011-03-01 | Imec | Formation of single crystal semiconductor nanowires |
| DE102009024311A1 (de) * | 2009-06-05 | 2011-01-05 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Halbleiterbauelement und Verfahren zu seiner Herstellung |
| KR101857582B1 (ko) | 2011-12-20 | 2018-05-14 | 인텔 코포레이션 | 반도체 구조물 및 제조 방법 |
| KR20130131708A (ko) | 2012-05-24 | 2013-12-04 | 에스케이하이닉스 주식회사 | 메모리 셀 어레이 및 이를 포함하는 가변 저항 메모리 장치 |
| US9006810B2 (en) * | 2012-06-07 | 2015-04-14 | International Business Machines Corporation | DRAM with a nanowire access transistor |
| EP2674978B1 (en) * | 2012-06-15 | 2020-07-29 | IMEC vzw | Tunnel field effect transistor device and method for making the device |
| WO2014024266A1 (ja) * | 2012-08-08 | 2014-02-13 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置の製造方法、及び、半導体装置 |
| KR20140040543A (ko) * | 2012-09-26 | 2014-04-03 | 삼성전자주식회사 | 핀 구조의 전계효과 트랜지스터, 이를 포함하는 메모리 장치 및 그 반도체 장치 |
| KR20140078326A (ko) * | 2012-12-17 | 2014-06-25 | 경북대학교 산학협력단 | 터널링 전계효과 트랜지스터 및 터널링 전계효과 트랜지스터의 제조 방법 |
| JP5886802B2 (ja) * | 2013-08-29 | 2016-03-16 | 株式会社東芝 | 半導体装置 |
| US9425296B2 (en) * | 2013-09-09 | 2016-08-23 | Qualcomm Incorporated | Vertical tunnel field effect transistor |
| US10727339B2 (en) | 2014-03-28 | 2020-07-28 | Intel Corporation | Selectively regrown top contact for vertical semiconductor devices |
| US9941394B2 (en) | 2014-04-30 | 2018-04-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Tunnel field-effect transistor |
| US9673209B2 (en) | 2014-05-16 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device and method for fabricating the same |
| US10361090B2 (en) | 2014-06-13 | 2019-07-23 | Intel Corporation | Vertical channel transistors fabrication process by selective subtraction of a regular grid |
| US10559690B2 (en) | 2014-09-18 | 2020-02-11 | International Business Machines Corporation | Embedded source/drain structure for tall FinFET and method of formation |
| US9818877B2 (en) | 2014-09-18 | 2017-11-14 | International Business Machines Corporation | Embedded source/drain structure for tall finFET and method of formation |
| US9634084B1 (en) | 2016-02-10 | 2017-04-25 | Globalfoundries Inc. | Conformal buffer layer in source and drain regions of fin-type transistors |
| US10186510B2 (en) * | 2017-05-01 | 2019-01-22 | Advanced Micro Devices, Inc. | Vertical gate all around library architecture |
| US10374041B2 (en) | 2017-12-21 | 2019-08-06 | International Business Machines Corporation | Field effect transistor with controllable resistance |
| KR102593708B1 (ko) * | 2018-08-14 | 2023-10-26 | 삼성전자주식회사 | 반도체 장치 및 반도체 장치의 제조 방법 |
Family Cites Families (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4941026A (en) * | 1986-12-05 | 1990-07-10 | General Electric Company | Semiconductor devices exhibiting minimum on-resistance |
| JPH07112067B2 (ja) * | 1990-01-24 | 1995-11-29 | 株式会社東芝 | 半導体装置 |
| US5013680A (en) * | 1990-07-18 | 1991-05-07 | Micron Technology, Inc. | Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography |
| JP3202223B2 (ja) | 1990-11-27 | 2001-08-27 | 日本電気株式会社 | トランジスタの製造方法 |
| JP3219307B2 (ja) * | 1991-08-28 | 2001-10-15 | シャープ株式会社 | 半導体装置の構造および製造方法 |
| JPH05160408A (ja) * | 1991-12-04 | 1993-06-25 | Toshiba Corp | 電界効果トランジスタおよびこれを用いたダイナミック型半導体記憶装置 |
| JP3321788B2 (ja) * | 1994-05-06 | 2002-09-09 | ソニー株式会社 | Mis型半導体装置及びその製造方法 |
| JP3246196B2 (ja) * | 1994-07-13 | 2002-01-15 | ソニー株式会社 | 量子細線デバイスの形成方法 |
| JP4047098B2 (ja) * | 1994-09-13 | 2008-02-13 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US5990509A (en) * | 1997-01-22 | 1999-11-23 | International Business Machines Corporation | 2F-square memory cell for gigabit memory applications |
| US6063688A (en) * | 1997-09-29 | 2000-05-16 | Intel Corporation | Fabrication of deep submicron structures and quantum wire transistors using hard-mask transistor width definition |
| US6747313B1 (en) * | 1997-12-17 | 2004-06-08 | Hyundai Electronics Industries Co., Ltd. | Thin film transistor |
| DE19943390A1 (de) * | 1999-09-10 | 2001-05-03 | Walter Hansch | Halbleiterbauelement |
| US6967140B2 (en) * | 2000-03-01 | 2005-11-22 | Intel Corporation | Quantum wire gate device and method of making same |
| US6413802B1 (en) * | 2000-10-23 | 2002-07-02 | The Regents Of The University Of California | Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture |
| US6664143B2 (en) | 2000-11-22 | 2003-12-16 | North Carolina State University | Methods of fabricating vertical field effect transistors by conformal channel layer deposition on sidewalls |
| US6531727B2 (en) * | 2001-02-09 | 2003-03-11 | Micron Technology, Inc. | Open bit line DRAM with ultra thin body transistors |
| FR2823009B1 (fr) * | 2001-04-02 | 2004-07-09 | St Microelectronics Sa | Procede de fabrication d'un transistor vertical a grille isolee a faible recouvrement de la grille sur la source et sur le drain, et circuit integre comportant un tel transistor |
| US20030008515A1 (en) * | 2001-07-03 | 2003-01-09 | Tai-Ju Chen | Method of fabricating a vertical MOS transistor |
| US6815750B1 (en) * | 2002-05-22 | 2004-11-09 | Hewlett-Packard Development Company, L.P. | Field effect transistor with channel extending through layers on a substrate |
| US6821834B2 (en) * | 2002-12-04 | 2004-11-23 | Yoshiyuki Ando | Ion implantation methods and transistor cell layout for fin type transistors |
| US6794718B2 (en) * | 2002-12-19 | 2004-09-21 | International Business Machines Corporation | High mobility crystalline planes in double-gate CMOS technology |
| JP4108537B2 (ja) * | 2003-05-28 | 2008-06-25 | 富士雄 舛岡 | 半導体装置 |
| US6855582B1 (en) * | 2003-06-12 | 2005-02-15 | Advanced Micro Devices, Inc. | FinFET gate formation using reverse trim and oxide polish |
| JP2005116969A (ja) * | 2003-10-10 | 2005-04-28 | Toshiba Corp | 半導体装置及びその製造方法 |
| US7348243B2 (en) * | 2003-12-27 | 2008-03-25 | Dongbu Electronics Co., Ltd. | Semiconductor device and method for fabricating the same |
| WO2005079182A2 (en) * | 2004-01-22 | 2005-09-01 | International Business Machines Corporation | Vertical fin-fet mos devices |
| US7122425B2 (en) * | 2004-08-24 | 2006-10-17 | Micron Technology, Inc. | Methods of forming semiconductor constructions |
| US7242057B2 (en) * | 2004-08-26 | 2007-07-10 | Micron Technology, Inc. | Vertical transistor structures having vertical-surrounding-gates with self-aligned features |
| US7241655B2 (en) * | 2004-08-30 | 2007-07-10 | Micron Technology, Inc. | Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array |
| US7910288B2 (en) * | 2004-09-01 | 2011-03-22 | Micron Technology, Inc. | Mask material conversion |
| JP3764161B2 (ja) * | 2004-09-17 | 2006-04-05 | 株式会社半導体エネルギー研究所 | 半導体装置およびその作製方法 |
| DE102005045078B4 (de) * | 2004-09-25 | 2009-01-22 | Samsung Electronics Co., Ltd., Suwon | Feldeffekttransistor mit einer verspannten Kanalschicht an Seitenwänden einer Struktur an einem Halbleitersubstrat |
-
2007
- 2007-04-03 JP JP2009504238A patent/JP5229635B2/ja active Active
- 2007-04-03 KR KR1020147009477A patent/KR20140051463A/ko not_active Ceased
- 2007-04-03 SG SG2011038726A patent/SG172643A1/en unknown
- 2007-04-03 EP EP07754850A patent/EP2008309A1/en not_active Ceased
- 2007-04-03 WO PCT/US2007/008124 patent/WO2007120493A1/en not_active Ceased
- 2007-04-03 EP EP07754621.6A patent/EP2002468B1/en not_active Not-in-force
- 2007-04-03 WO PCT/US2007/008123 patent/WO2007120492A1/en not_active Ceased
- 2007-04-03 JP JP2009504232A patent/JP5229587B2/ja active Active
- 2007-04-03 EP EP07754622A patent/EP2002469A1/en not_active Withdrawn
- 2007-04-03 JP JP2009504280A patent/JP5234439B2/ja active Active
- 2007-04-03 KR KR1020087026970A patent/KR20090007393A/ko not_active Withdrawn
- 2007-04-03 KR KR1020087027075A patent/KR20090006169A/ko not_active Ceased
- 2007-04-03 WO PCT/US2007/008400 patent/WO2007114927A1/en not_active Ceased
- 2007-04-03 JP JP2009504239A patent/JP2009532905A/ja not_active Withdrawn
- 2007-04-03 SG SG201102381-9A patent/SG170827A1/en unknown
- 2007-04-03 WO PCT/US2007/008084 patent/WO2007136461A2/en not_active Ceased
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2008
- 2008-11-03 KR KR1020087026973A patent/KR101474028B1/ko active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2007120492A1 (en) | 2007-10-25 |
| EP2002470A2 (en) | 2008-12-17 |
| JP5234439B2 (ja) | 2013-07-10 |
| KR20090007393A (ko) | 2009-01-16 |
| WO2007136461A2 (en) | 2007-11-29 |
| SG170827A1 (en) | 2011-05-30 |
| WO2007114927A1 (en) | 2007-10-11 |
| EP2002469A1 (en) | 2008-12-17 |
| EP2002470B1 (en) | 2016-03-09 |
| EP2002468B1 (en) | 2013-07-24 |
| JP2009532904A (ja) | 2009-09-10 |
| EP2008309A1 (en) | 2008-12-31 |
| WO2007136461A3 (en) | 2008-01-17 |
| JP2009532905A (ja) | 2009-09-10 |
| KR101474028B1 (ko) | 2014-12-17 |
| SG172643A1 (en) | 2011-07-28 |
| JP5229635B2 (ja) | 2013-07-03 |
| JP2009532903A (ja) | 2009-09-10 |
| KR20090007397A (ko) | 2009-01-16 |
| JP2009532907A (ja) | 2009-09-10 |
| KR20090006169A (ko) | 2009-01-14 |
| EP2002468A1 (en) | 2008-12-17 |
| KR101378256B1 (ko) | 2014-03-25 |
| KR20090005149A (ko) | 2009-01-12 |
| JP5229587B2 (ja) | 2013-07-03 |
| WO2007120493A1 (en) | 2007-10-25 |
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