KR20110081318A - 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치 - Google Patents

방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치 Download PDF

Info

Publication number
KR20110081318A
KR20110081318A KR1020117012220A KR20117012220A KR20110081318A KR 20110081318 A KR20110081318 A KR 20110081318A KR 1020117012220 A KR1020117012220 A KR 1020117012220A KR 20117012220 A KR20117012220 A KR 20117012220A KR 20110081318 A KR20110081318 A KR 20110081318A
Authority
KR
South Korea
Prior art keywords
semiconductor wafer
weakened slice
donor semiconductor
ion implantation
density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR1020117012220A
Other languages
English (en)
Korean (ko)
Inventor
사코 체렉드지엔
제퍼리 에스 사이츠
제임스 쥐 코우일라드
리차드 오 마쉬메이어
미카엘 제이. 무어
알렉스 우센코
Original Assignee
코닝 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/290,362 external-priority patent/US7816225B2/en
Priority claimed from US12/290,384 external-priority patent/US8003491B2/en
Application filed by 코닝 인코포레이티드 filed Critical 코닝 인코포레이티드
Publication of KR20110081318A publication Critical patent/KR20110081318A/ko
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H10P90/1916—
    • H10P58/00—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10W10/011—
    • H10W10/10—
    • H10W10/181—

Landscapes

  • Element Separation (AREA)
  • Physical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
KR1020117012220A 2008-10-30 2009-10-29 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치 Abandoned KR20110081318A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US12/290,362 US7816225B2 (en) 2008-10-30 2008-10-30 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
US12/290,384 2008-10-30
US12/290,362 2008-10-30
US12/290,384 US8003491B2 (en) 2008-10-30 2008-10-30 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation

Publications (1)

Publication Number Publication Date
KR20110081318A true KR20110081318A (ko) 2011-07-13

Family

ID=41559616

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020117012220A Abandoned KR20110081318A (ko) 2008-10-30 2009-10-29 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치
KR1020117012221A Expired - Fee Related KR101568898B1 (ko) 2008-10-30 2009-10-29 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020117012221A Expired - Fee Related KR101568898B1 (ko) 2008-10-30 2009-10-29 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치

Country Status (6)

Country Link
EP (2) EP2356676A2 (enExample)
JP (2) JP5650652B2 (enExample)
KR (2) KR20110081318A (enExample)
CN (2) CN102203933B (enExample)
TW (2) TWI430338B (enExample)
WO (2) WO2010059361A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5703853B2 (ja) * 2011-03-04 2015-04-22 信越半導体株式会社 貼り合わせウェーハの製造方法
FR3055063B1 (fr) * 2016-08-11 2018-08-31 Soitec Procede de transfert d'une couche utile
CN111834205B (zh) * 2020-07-07 2021-12-28 中国科学院上海微系统与信息技术研究所 一种异质半导体薄膜及其制备方法
CN114975765A (zh) * 2022-07-19 2022-08-30 济南晶正电子科技有限公司 复合单晶压电薄膜及其制备方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2714524B1 (fr) * 1993-12-23 1996-01-26 Commissariat Energie Atomique Procede de realisation d'une structure en relief sur un support en materiau semiconducteur
US6159824A (en) * 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
MY118019A (en) 1998-02-18 2004-08-30 Canon Kk Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
JP3031904B2 (ja) * 1998-02-18 2000-04-10 キヤノン株式会社 複合部材とその分離方法、及びそれを利用した半導体基体の製造方法
US20010007790A1 (en) * 1998-06-23 2001-07-12 Henley Francois J. Pre-semiconductor process implant and post-process film separation
US6054370A (en) * 1998-06-30 2000-04-25 Intel Corporation Method of delaminating a pre-fabricated transistor layer from a substrate for placement on another wafer
FR2811807B1 (fr) * 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
JP2002124652A (ja) * 2000-10-16 2002-04-26 Seiko Epson Corp 半導体基板の製造方法、半導体基板、電気光学装置並びに電子機器
FR2830983B1 (fr) * 2001-10-11 2004-05-14 Commissariat Energie Atomique Procede de fabrication de couches minces contenant des microcomposants
FR2847077B1 (fr) * 2002-11-12 2006-02-17 Soitec Silicon On Insulator Composants semi-conducteurs, et notamment de type soi mixtes, et procede de realisation
EP1429381B1 (en) * 2002-12-10 2011-07-06 S.O.I.Tec Silicon on Insulator Technologies A method for manufacturing a material compound
US7176528B2 (en) 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures
DE10318283A1 (de) * 2003-04-22 2004-11-25 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur
US7148124B1 (en) * 2004-11-18 2006-12-12 Alexander Yuri Usenko Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers
JP2006324051A (ja) * 2005-05-17 2006-11-30 Nissin Ion Equipment Co Ltd 荷電粒子ビーム照射方法および装置
JP4977999B2 (ja) * 2005-11-21 2012-07-18 株式会社Ｓｕｍｃｏ 貼合せ基板の製造方法及びその方法で製造された貼合せ基板
US7691730B2 (en) * 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator

Also Published As

Publication number Publication date
JP5650653B2 (ja) 2015-01-07
JP2012507870A (ja) 2012-03-29
CN102203933A (zh) 2011-09-28
TWI430338B (zh) 2014-03-11
WO2010059361A2 (en) 2010-05-27
WO2010059361A3 (en) 2010-08-12
CN102203934A (zh) 2011-09-28
TW201030815A (en) 2010-08-16
TWI451534B (zh) 2014-09-01
EP2356676A2 (en) 2011-08-17
EP2359400A2 (en) 2011-08-24
CN102203934B (zh) 2014-02-12
WO2010059367A2 (en) 2010-05-27
CN102203933B (zh) 2015-12-02
TW201036112A (en) 2010-10-01
KR101568898B1 (ko) 2015-11-12
JP5650652B2 (ja) 2015-01-07
JP2012507868A (ja) 2012-03-29
WO2010059367A3 (en) 2010-08-05
KR20110081881A (ko) 2011-07-14

Similar Documents

Publication Publication Date Title
US8338269B2 (en) Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
KR100614860B1 (ko) 원하는 기판 상에 단결정 물질의 박막을 전달하는 방법
US6429104B1 (en) Method for forming cavities in a semiconductor substrate by implanting atoms
JP6371761B2 (ja) 光電子工学デバイスを形成するための技術
CN102903664B (zh) 将单晶半导体层转移到支承衬底上的方法
KR101134485B1 (ko) 공동 주입 및 후속 주입에 의해 박막을 획득하는 방법
KR100634528B1 (ko) 단결정 실리콘 필름의 제조방법
CN107623038B (zh) 用于产生超级结器件的方法
US8003491B2 (en) Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
WO2004008514A1 (en) Process for forming a fragile layer inside of a single crystalline substrate
KR101568898B1 (ko) 방향성 박리를 사용한 반도체 온 절연체 구조를 생성하기 위한 방법 및 장치
JP2012507870A5 (enExample)
US6952269B2 (en) Apparatus and method for adiabatically heating a semiconductor surface
US8258043B2 (en) Manufacturing method of thin film semiconductor substrate
Direction c12) United States Patent
KR20030076627A (ko) Ｓｏｉ 재료의 제조 방법
Huang et al. A nano-thick SOI fabrication method

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

PC1904 Unpaid initial registration fee

St.27 status event code: A-2-2-U10-U14-oth-PC1904

St.27 status event code: N-2-6-B10-B12-nap-PC1904

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000