CN102203933B - 使用定向剥落在绝缘体结构上形成半导体的方法和装置 - Google Patents

使用定向剥落在绝缘体结构上形成半导体的方法和装置 Download PDF

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Publication number
CN102203933B
CN102203933B CN200980143709.4A CN200980143709A CN102203933B CN 102203933 B CN102203933 B CN 102203933B CN 200980143709 A CN200980143709 A CN 200980143709A CN 102203933 B CN102203933 B CN 102203933B
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CN
China
Prior art keywords
weakened
lamina
semiconductor wafer
donor semiconductor
density
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200980143709.4A
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English (en)
Chinese (zh)
Other versions
CN102203933A (zh
Inventor
S·切瑞克德简
J·S·希特斯
J·G·库亚德
R·O·马斯克梅耶
M·J·莫尔
A·尤森科
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Corning Inc
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Corning Inc
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Filing date
Publication date
Priority claimed from US12/290,384 external-priority patent/US8003491B2/en
Priority claimed from US12/290,362 external-priority patent/US7816225B2/en
Application filed by Corning Inc filed Critical Corning Inc
Publication of CN102203933A publication Critical patent/CN102203933A/zh
Application granted granted Critical
Publication of CN102203933B publication Critical patent/CN102203933B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/011Division of wafers or substrates to produce devices, each consisting of a single electric circuit element
    • H10D89/015Division of wafers or substrates to produce devices, each consisting of a single electric circuit element the wafers or substrates being other than semiconductor bodies, e.g. insulating bodies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Physical Vapour Deposition (AREA)
  • Recrystallisation Techniques (AREA)
CN200980143709.4A 2008-10-30 2009-10-29 使用定向剥落在绝缘体结构上形成半导体的方法和装置 Expired - Fee Related CN102203933B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US12/290,384 US8003491B2 (en) 2008-10-30 2008-10-30 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
US12/290,362 2008-10-30
US12/290,384 2008-10-30
US12/290,362 US7816225B2 (en) 2008-10-30 2008-10-30 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation
PCT/US2009/062531 WO2010059367A2 (en) 2008-10-30 2009-10-29 Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation

Publications (2)

Publication Number Publication Date
CN102203933A CN102203933A (zh) 2011-09-28
CN102203933B true CN102203933B (zh) 2015-12-02

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
CN200980143709.4A Expired - Fee Related CN102203933B (zh) 2008-10-30 2009-10-29 使用定向剥落在绝缘体结构上形成半导体的方法和装置
CN200980143710.7A Expired - Fee Related CN102203934B (zh) 2008-10-30 2009-10-29 使用定向剥落在绝缘体结构上形成半导体的方法和装置

Family Applications After (1)

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CN200980143710.7A Expired - Fee Related CN102203934B (zh) 2008-10-30 2009-10-29 使用定向剥落在绝缘体结构上形成半导体的方法和装置

Country Status (6)

Country Link
EP (2) EP2356676A2 (enExample)
JP (2) JP5650652B2 (enExample)
KR (2) KR101568898B1 (enExample)
CN (2) CN102203933B (enExample)
TW (2) TWI430338B (enExample)
WO (2) WO2010059361A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5703853B2 (ja) * 2011-03-04 2015-04-22 信越半導体株式会社 貼り合わせウェーハの製造方法
FR3055063B1 (fr) * 2016-08-11 2018-08-31 Soitec Procede de transfert d'une couche utile
CN111834205B (zh) * 2020-07-07 2021-12-28 中国科学院上海微系统与信息技术研究所 一种异质半导体薄膜及其制备方法
CN114975765A (zh) * 2022-07-19 2022-08-30 济南晶正电子科技有限公司 复合单晶压电薄膜及其制备方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1228607A (zh) * 1998-02-18 1999-09-15 佳能株式会社 复合部件及其分离方法和半导体衬底的制备方法
CN1586004A (zh) * 2001-10-11 2005-02-23 原子能委员会 用于制造含微型元件的薄层的方法

Family Cites Families (15)

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Publication number Priority date Publication date Assignee Title
FR2714524B1 (fr) * 1993-12-23 1996-01-26 Commissariat Energie Atomique Procede de realisation d'une structure en relief sur un support en materiau semiconducteur
US6048411A (en) * 1997-05-12 2000-04-11 Silicon Genesis Corporation Silicon-on-silicon hybrid wafer assembly
JP3031904B2 (ja) * 1998-02-18 2000-04-10 キヤノン株式会社 複合部材とその分離方法、及びそれを利用した半導体基体の製造方法
US20010007790A1 (en) * 1998-06-23 2001-07-12 Henley Francois J. Pre-semiconductor process implant and post-process film separation
US6054370A (en) * 1998-06-30 2000-04-25 Intel Corporation Method of delaminating a pre-fabricated transistor layer from a substrate for placement on another wafer
FR2811807B1 (fr) * 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
JP2002124652A (ja) * 2000-10-16 2002-04-26 Seiko Epson Corp 半導体基板の製造方法、半導体基板、電気光学装置並びに電子機器
FR2847077B1 (fr) * 2002-11-12 2006-02-17 Soitec Silicon On Insulator Composants semi-conducteurs, et notamment de type soi mixtes, et procede de realisation
EP1429381B1 (en) * 2002-12-10 2011-07-06 S.O.I.Tec Silicon on Insulator Technologies A method for manufacturing a material compound
US7176528B2 (en) 2003-02-18 2007-02-13 Corning Incorporated Glass-based SOI structures
DE10318283A1 (de) * 2003-04-22 2004-11-25 Forschungszentrum Jülich GmbH Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur
US7148124B1 (en) * 2004-11-18 2006-12-12 Alexander Yuri Usenko Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers
JP2006324051A (ja) * 2005-05-17 2006-11-30 Nissin Ion Equipment Co Ltd 荷電粒子ビーム照射方法および装置
JP4977999B2 (ja) * 2005-11-21 2012-07-18 株式会社Sumco 貼合せ基板の製造方法及びその方法で製造された貼合せ基板
US7691730B2 (en) * 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1228607A (zh) * 1998-02-18 1999-09-15 佳能株式会社 复合部件及其分离方法和半导体衬底的制备方法
CN1586004A (zh) * 2001-10-11 2005-02-23 原子能委员会 用于制造含微型元件的薄层的方法

Also Published As

Publication number Publication date
JP2012507870A (ja) 2012-03-29
CN102203934A (zh) 2011-09-28
WO2010059367A2 (en) 2010-05-27
WO2010059367A3 (en) 2010-08-05
WO2010059361A3 (en) 2010-08-12
KR20110081881A (ko) 2011-07-14
JP5650652B2 (ja) 2015-01-07
CN102203934B (zh) 2014-02-12
JP2012507868A (ja) 2012-03-29
TW201030815A (en) 2010-08-16
TWI451534B (zh) 2014-09-01
TW201036112A (en) 2010-10-01
EP2356676A2 (en) 2011-08-17
CN102203933A (zh) 2011-09-28
KR101568898B1 (ko) 2015-11-12
KR20110081318A (ko) 2011-07-13
EP2359400A2 (en) 2011-08-24
JP5650653B2 (ja) 2015-01-07
WO2010059361A2 (en) 2010-05-27
TWI430338B (zh) 2014-03-11

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Granted publication date: 20151202

Termination date: 20171029