KR20010058159A - 박막 트랜지스터-액정표시소자의 제조방법 - Google Patents
박막 트랜지스터-액정표시소자의 제조방법 Download PDFInfo
- Publication number
- KR20010058159A KR20010058159A KR1019990061662A KR19990061662A KR20010058159A KR 20010058159 A KR20010058159 A KR 20010058159A KR 1019990061662 A KR1019990061662 A KR 1019990061662A KR 19990061662 A KR19990061662 A KR 19990061662A KR 20010058159 A KR20010058159 A KR 20010058159A
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- photolithography process
- electrode
- amorphous silicon
- source
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- 238000004519 manufacturing process Methods 0.000 title abstract description 18
- 238000000206 photolithography Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000010409 thin film Substances 0.000 claims abstract description 21
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 20
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 238000002161 passivation Methods 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 12
- 239000004020 conductor Substances 0.000 claims abstract description 9
- 238000003860 storage Methods 0.000 claims abstract description 7
- 239000010408 film Substances 0.000 claims description 46
- 238000000151 deposition Methods 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
Description
Claims (2)
- 절연 기판 상부에 금속막을 증착하고, 제 1 사진 식각 공정으로 게이트 전극 및 스토리지 전극을 형성하는 단계;상기 게이트 전극 배선이 형성된 절연 기판 상부에 게이트 절연막, 채널용 비정질 실리콘층, 도핑된 반도체층 및 소오스, 드레인용 금속막을 순차적으로 적층하는 단계;상기 소오스, 드레인용 금속막 및 도핑된 반도체층을 제 2 사진 식각 공정에 의하여, 소정 부분 패터닝하여 소오스, 드레인 전극을 형성하는 단계;상기 소오스, 드레인 전극이 형성된 절연 기판 상부에 패시베이션막을 증착하는 단계;상기 드레인 전극의 소정 부분이 노출됨과 동시에, 상기 비정질 실리콘층이 박막 트랜지스터의 액티브 영역의 형태를 갖추도록, 제 3 사진 식각 공정을 통하여, 패시베이션막의 소정 부분을 식각하여 비아홀을 형성함과 동시에, 패시베이션막, 비정질 실리콘층 및 게이트 절연막을 식각하여 박막 트랜지스터의 액티브 영역을 구축하는 단계;상기 노출된 드레인 전극과 콘택되도록 투명 도전 물질을 증착하는 단계; 및상기 투명 도전 물질을 제 4 사진 식각 공정을 통하여 패터닝하여, 화소 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 TFT-LCD의 제조방법.
- 제 1 항에 있어서, 상기 투명 전도 물질은 ITO(indium tin oxide)인 것을 특징으로 하는 TFT-LCD의 제조방법.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990061662A KR100653467B1 (ko) | 1999-12-24 | 1999-12-24 | 박막 트랜지스터-액정표시소자의 제조방법 |
US09/736,905 US6500702B2 (en) | 1999-12-24 | 2000-12-13 | Method for manufacturing thin film transistor liquid crystal display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990061662A KR100653467B1 (ko) | 1999-12-24 | 1999-12-24 | 박막 트랜지스터-액정표시소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010058159A true KR20010058159A (ko) | 2001-07-05 |
KR100653467B1 KR100653467B1 (ko) | 2006-12-04 |
Family
ID=19629252
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019990061662A KR100653467B1 (ko) | 1999-12-24 | 1999-12-24 | 박막 트랜지스터-액정표시소자의 제조방법 |
Country Status (2)
Country | Link |
---|---|
US (1) | US6500702B2 (ko) |
KR (1) | KR100653467B1 (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100929093B1 (ko) * | 2007-12-26 | 2009-11-30 | 재단법인서울대학교산학협력재단 | 금속 유도 수직 결정화를 이용한 비정질 실리콘 박막의결정화 방법 및 이를 이용한 다결정 박막 트랜지스터의제조방법 |
KR100949040B1 (ko) * | 2003-06-23 | 2010-03-24 | 엘지디스플레이 주식회사 | 박막 트랜지스터 어레이 기판 및 그 제조방법 |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100611042B1 (ko) * | 1999-12-27 | 2006-08-09 | 엘지.필립스 엘시디 주식회사 | 액정 표시장치 제조방법 및 그 제조방법에 따른액정표시장치 |
US7288444B2 (en) * | 2001-04-04 | 2007-10-30 | Samsung Sdi Co., Ltd. | Thin film transistor and method of manufacturing the same |
KR100437474B1 (ko) * | 2001-04-04 | 2004-06-23 | 삼성에스디아이 주식회사 | 듀얼채널층을 갖는 박막 트랜지스터 및 그의 제조방법 |
KR100731037B1 (ko) * | 2001-05-07 | 2007-06-22 | 엘지.필립스 엘시디 주식회사 | 액정표시장치 및 그 제조방법 |
TW200421439A (en) * | 2003-04-04 | 2004-10-16 | Innolux Display Corp | Photo-mask process and the method of fabricating a thin film transistor |
CN1322372C (zh) * | 2003-04-08 | 2007-06-20 | 鸿富锦精密工业(深圳)有限公司 | 光罩工艺及薄膜晶体管的制造方法 |
KR100500779B1 (ko) * | 2003-10-10 | 2005-07-12 | 엘지.필립스 엘시디 주식회사 | 박막 트랜지스터 어레이 기판의 제조 방법 |
TW200530717A (en) * | 2004-03-05 | 2005-09-16 | Innolux Display Corp | Thin film transistor and method for manufacturing it |
US7382421B2 (en) * | 2004-10-12 | 2008-06-03 | Hewlett-Packard Development Company, L.P. | Thin film transistor with a passivation layer |
TWI321362B (en) * | 2007-02-16 | 2010-03-01 | Au Optronics Corp | Semiconductor structures and fabrication method thereof |
KR101182403B1 (ko) | 2008-12-22 | 2012-09-13 | 한국전자통신연구원 | 투명 트랜지스터 및 그의 제조 방법 |
KR101218090B1 (ko) | 2009-05-27 | 2013-01-18 | 엘지디스플레이 주식회사 | 산화물 박막 트랜지스터 및 그 제조방법 |
KR101280827B1 (ko) * | 2009-11-20 | 2013-07-02 | 엘지디스플레이 주식회사 | 어레이 기판 및 이의 제조방법 |
TWI417966B (zh) * | 2011-05-19 | 2013-12-01 | Chunghwa Picture Tubes Ltd | 畫素結構的製作方法 |
CN102629576A (zh) * | 2011-09-26 | 2012-08-08 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0818058A (ja) * | 1994-06-27 | 1996-01-19 | Furontetsuku:Kk | 薄膜トランジスタアレイおよび液晶表示装置 |
JPH1048664A (ja) * | 1996-07-19 | 1998-02-20 | Lg Electron Inc | 液晶表示装置及びその製造方法 |
KR100436011B1 (ko) * | 1996-11-26 | 2004-11-06 | 삼성전자주식회사 | 유기절연막을이용한액정표시장치및그제조방법 |
JP3270361B2 (ja) * | 1997-06-09 | 2002-04-02 | 日本電気株式会社 | 薄膜トランジスタアレイ及びその製造方法 |
KR100321925B1 (ko) * | 1998-11-26 | 2002-10-25 | 삼성전자 주식회사 | 4장의마스크를이용한액정표시장치용박막트랜지스터기판의제조방법및액정표시장치용박막트랜지스터기판 |
-
1999
- 1999-12-24 KR KR1019990061662A patent/KR100653467B1/ko active IP Right Grant
-
2000
- 2000-12-13 US US09/736,905 patent/US6500702B2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100949040B1 (ko) * | 2003-06-23 | 2010-03-24 | 엘지디스플레이 주식회사 | 박막 트랜지스터 어레이 기판 및 그 제조방법 |
KR100929093B1 (ko) * | 2007-12-26 | 2009-11-30 | 재단법인서울대학교산학협력재단 | 금속 유도 수직 결정화를 이용한 비정질 실리콘 박막의결정화 방법 및 이를 이용한 다결정 박막 트랜지스터의제조방법 |
Also Published As
Publication number | Publication date |
---|---|
US20010005596A1 (en) | 2001-06-28 |
US6500702B2 (en) | 2002-12-31 |
KR100653467B1 (ko) | 2006-12-04 |
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