KR100590925B1 - 박막트랜지스터-액정표시장치의 제조방법 - Google Patents
박막트랜지스터-액정표시장치의 제조방법 Download PDFInfo
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- KR100590925B1 KR100590925B1 KR1019990031418A KR19990031418A KR100590925B1 KR 100590925 B1 KR100590925 B1 KR 100590925B1 KR 1019990031418 A KR1019990031418 A KR 1019990031418A KR 19990031418 A KR19990031418 A KR 19990031418A KR 100590925 B1 KR100590925 B1 KR 100590925B1
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- 238000000034 method Methods 0.000 title claims description 16
- 238000004519 manufacturing process Methods 0.000 title abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 30
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000002161 passivation Methods 0.000 claims abstract description 14
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000005530 etching Methods 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 239000010408 film Substances 0.000 abstract description 40
- 239000010409 thin film Substances 0.000 abstract description 18
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 13
- 238000000206 photolithography Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Ceramic Engineering (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (3)
- 절연 기판 상부에 게이트 전극을 형성하는 단계;상기 게이트 전극 상부에 게이트 절연막, 비정질 실리콘층, 도핑된 반도체층과 소오스 및 드레인용 금속막을 순차적으로 적층하는 단계;상기 소오스 및 드레인용 금속막 상부에 액티브 영역을 한정하기 위하여 액티브용 레지스트 패턴을 형성하는 단계로, 상기 액티브용 레지스트 패턴은 상기 게이트 전극과 대응하는 부분의 두께가 상대적으로 얇게 형성하는 단계;상기 액티브용 레지스트 패턴을 마스크로 하여 상기 소오스 및 드레인용 금속막, 도핑된 반도체층 및 비정질 실리콘층을 액티브 형태로 식각하여 상기 비정질 실리콘층으로 채널층을 한정하는 단계;상기 액티브용 레지스트 패턴의 상기 게이트 전극과 대응하는 상대적으로 얇은 두께를 가진 부분을 상기 액티브용 마스크를 이용하여 재노광하고 상기 소오스 및 드레인용 금속막이 노출되도록 현상하여 소오스 및 드레인 전극용 레지스트 패턴을 형성하는 단계;상기 소오스 및 드레인 전극용 레지스트 패턴을 이용하여 상기 게이트 전극과 대응하는 부분의 상기 소오스 및 드레인용 금속막 및 도핑된 반도체층을 상기 비정질 실리콘층이 노출되도록 식각하여 소오스 및 드레인 전극을 형성하는 단계;상기 소오스 및 드레인 전극용 레지스트 패턴을 제거하는 단계;상기 기판 결과물 상부에 보호막을 증착하는 단계;상기 보호막 상에 드레인 전극이 노출되도록 보호막을 식각하는 단계; 및상기 보호막 상부에 드레인 전극과 콘택되도록 화소 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 박막 트랜지스터-액정 표시 장치의 제조방법.
- 제 1 항에 있어서, 상기 액티브용 레지스트 패턴을 형성하는 단계는 상기 소오스 및 드레인용 금속막 상에 포토레지스트막을 도포하는 공정; 상기 게이트 전극과 대응하는 부분에 노광량이 부족하도록 노광 한계치보다 작은 패턴이 수개 배치되어 있는 액티브용 마스크를 이용하여 상기 포토레지스트막을 노광하는 공정; 상기 노광된 포토레지스트막을 상기 게이트 전극과 대응하는 부분에 상대적으로 얇은 두께의 포토레지스트막이 잔류하도록 현상하는 공정을 포함하는 것을 특징으로 하는 박막 트랜지스터-액정 표시 장치의 제조방법.
- 삭제
Priority Applications (1)
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KR1019990031418A KR100590925B1 (ko) | 1999-07-30 | 1999-07-30 | 박막트랜지스터-액정표시장치의 제조방법 |
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KR1019990031418A KR100590925B1 (ko) | 1999-07-30 | 1999-07-30 | 박막트랜지스터-액정표시장치의 제조방법 |
Publications (2)
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KR20010011855A KR20010011855A (ko) | 2001-02-15 |
KR100590925B1 true KR100590925B1 (ko) | 2006-06-19 |
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KR1019990031418A KR100590925B1 (ko) | 1999-07-30 | 1999-07-30 | 박막트랜지스터-액정표시장치의 제조방법 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8349669B2 (en) | 2008-07-02 | 2013-01-08 | Applied Materials, Inc. | Thin film transistors using multiple active channel layers |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100646779B1 (ko) * | 1999-08-12 | 2006-11-17 | 삼성전자주식회사 | 박막 트랜지스터 어레이 기판의 제조 방법 |
KR101536101B1 (ko) | 2007-08-02 | 2015-07-13 | 어플라이드 머티어리얼스, 인코포레이티드 | 박막 반도체 물질들을 이용하는 박막 트랜지스터들 |
US8980066B2 (en) | 2008-03-14 | 2015-03-17 | Applied Materials, Inc. | Thin film metal oxynitride semiconductors |
WO2009117438A2 (en) | 2008-03-20 | 2009-09-24 | Applied Materials, Inc. | Process to make metal oxide thin film transistor array with etch stopping layer |
KR101733718B1 (ko) | 2009-09-24 | 2017-05-10 | 어플라이드 머티어리얼스, 인코포레이티드 | 소스 및 드레인 금속 식각을 위해 습식 프로세스를 이용하여 금속 산화물 또는 금속 산질화물 tft들을 제조하는 방법들 |
US8840763B2 (en) | 2009-09-28 | 2014-09-23 | Applied Materials, Inc. | Methods for stable process in a reactive sputtering process using zinc or doped zinc target |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05283429A (ja) * | 1992-03-30 | 1993-10-29 | Nec Corp | 薄膜トランジスタ装置の製造方法 |
JPH06236893A (ja) * | 1992-12-15 | 1994-08-23 | Matsushita Electric Ind Co Ltd | Tft液晶表示装置の製造方法 |
JPH0728077A (ja) * | 1993-07-15 | 1995-01-31 | Matsushita Electric Ind Co Ltd | 表示素子およびその製造方法 |
JPH09283763A (ja) * | 1996-04-16 | 1997-10-31 | Advanced Display:Kk | アクティブマトリクス基板の製法 |
-
1999
- 1999-07-30 KR KR1019990031418A patent/KR100590925B1/ko not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05283429A (ja) * | 1992-03-30 | 1993-10-29 | Nec Corp | 薄膜トランジスタ装置の製造方法 |
JPH06236893A (ja) * | 1992-12-15 | 1994-08-23 | Matsushita Electric Ind Co Ltd | Tft液晶表示装置の製造方法 |
JPH0728077A (ja) * | 1993-07-15 | 1995-01-31 | Matsushita Electric Ind Co Ltd | 表示素子およびその製造方法 |
JPH09283763A (ja) * | 1996-04-16 | 1997-10-31 | Advanced Display:Kk | アクティブマトリクス基板の製法 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8349669B2 (en) | 2008-07-02 | 2013-01-08 | Applied Materials, Inc. | Thin film transistors using multiple active channel layers |
US8435843B2 (en) | 2008-07-02 | 2013-05-07 | Applied Materials, Inc. | Treatment of gate dielectric for making high performance metal oxide and metal oxynitride thin film transistors |
US8809132B2 (en) | 2008-07-02 | 2014-08-19 | Applied Materials, Inc. | Capping layers for metal oxynitride TFTs |
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Publication number | Publication date |
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KR20010011855A (ko) | 2001-02-15 |
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