KR19990022039A - 반도체칩및반도체칩의제조방법 - Google Patents

반도체칩및반도체칩의제조방법 Download PDF

Info

Publication number
KR19990022039A
KR19990022039A KR1019970708518A KR19970708518A KR19990022039A KR 19990022039 A KR19990022039 A KR 19990022039A KR 1019970708518 A KR1019970708518 A KR 1019970708518A KR 19970708518 A KR19970708518 A KR 19970708518A KR 19990022039 A KR19990022039 A KR 19990022039A
Authority
KR
South Korea
Prior art keywords
semiconductor chip
cutting
manufacturing
semiconductor
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019970708518A
Other languages
English (en)
Korean (ko)
Inventor
코이치 키타구로
히로시 카도니시
Original Assignee
사토 게니치로
로무 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사토 게니치로, 로무 가부시키가이샤 filed Critical 사토 게니치로
Publication of KR19990022039A publication Critical patent/KR19990022039A/ko
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00Cutting or separating of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices

Landscapes

  • Dicing (AREA)
KR1019970708518A 1996-06-07 1997-06-06 반도체칩및반도체칩의제조방법 Ceased KR19990022039A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8145415A JPH09330891A (ja) 1996-06-07 1996-06-07 半導体チップおよび半導体チップの製造方法
JP96-145415 1996-06-07

Publications (1)

Publication Number Publication Date
KR19990022039A true KR19990022039A (ko) 1999-03-25

Family

ID=15384734

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970708518A Ceased KR19990022039A (ko) 1996-06-07 1997-06-06 반도체칩및반도체칩의제조방법

Country Status (5)

Country Link
EP (1) EP0844648A1 (https=)
JP (1) JPH09330891A (https=)
KR (1) KR19990022039A (https=)
CN (1) CN1097849C (https=)
WO (1) WO1997047029A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359769B1 (ko) * 2000-02-29 2002-11-07 주식회사 하이닉스반도체 하프톤 위상반전 마스크 및 그 제조방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110755A (ja) * 1999-10-04 2001-04-20 Tokyo Seimitsu Co Ltd 半導体チップ製造方法
JP3368876B2 (ja) 1999-11-05 2003-01-20 株式会社東京精密 半導体チップ製造方法
JP3992893B2 (ja) * 1999-12-02 2007-10-17 富士通株式会社 半導体装置のアンダーフィル方法
DE10029035C1 (de) * 2000-06-13 2002-02-28 Infineon Technologies Ag Verfahren zur Bearbeitung eines Wafers
JP2003332270A (ja) 2002-05-15 2003-11-21 Renesas Technology Corp 半導体装置およびその製造方法
JP4185704B2 (ja) 2002-05-15 2008-11-26 株式会社ルネサステクノロジ 半導体装置の製造方法
JP4961617B2 (ja) * 2007-10-01 2012-06-27 新光電気工業株式会社 配線基板とその製造方法及び半導体装置
JP5080338B2 (ja) * 2008-04-07 2012-11-21 株式会社豊田中央研究所 半導体素子を金属層によって基板に接合したモジュール
JP5503113B2 (ja) 2008-05-08 2014-05-28 古河電気工業株式会社 半導体装置、ウエハ構造体および半導体装置の製造方法
CN101989018B (zh) * 2009-08-05 2012-09-05 群康科技(深圳)有限公司 薄膜晶体管基板
WO2016068921A1 (en) * 2014-10-30 2016-05-06 Hewlett-Packard Development Company, L.P. Fluid ejection device
JP6950484B2 (ja) * 2017-11-20 2021-10-13 沖電気工業株式会社 半導体素子、発光基板、光プリントヘッド、画像形成装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56103447A (en) * 1980-01-22 1981-08-18 Toshiba Corp Dicing method of semiconductor wafer
JPS6214440A (ja) * 1985-07-12 1987-01-23 Mitsubishi Electric Corp 半導体ウエハ及びその分割方法
JPS6226839A (ja) * 1985-07-29 1987-02-04 Oki Electric Ind Co Ltd 半導体基板
JPS62186569A (ja) * 1986-02-12 1987-08-14 Nec Corp 電界効果型トランジスタの製造方法
JPS6418733U (https=) * 1987-07-22 1989-01-30
JPH0750700B2 (ja) * 1989-06-27 1995-05-31 三菱電機株式会社 半導体チップの製造方法
JPH05136261A (ja) * 1991-11-15 1993-06-01 Kawasaki Steel Corp 半導体チツプ及びウエハのダイシング方法
US5259925A (en) * 1992-06-05 1993-11-09 Mcdonnell Douglas Corporation Method of cleaning a plurality of semiconductor devices
EP0678904A1 (en) * 1994-04-12 1995-10-25 Lsi Logic Corporation Multicut wafer saw process
JPH08293476A (ja) * 1995-04-21 1996-11-05 Hitachi Ltd 半導体集積回路装置の製造方法および半導体ウエハならびにフォトマスク

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359769B1 (ko) * 2000-02-29 2002-11-07 주식회사 하이닉스반도체 하프톤 위상반전 마스크 및 그 제조방법

Also Published As

Publication number Publication date
CN1190489A (zh) 1998-08-12
CN1097849C (zh) 2003-01-01
EP0844648A4 (https=) 1998-06-17
JPH09330891A (ja) 1997-12-22
WO1997047029A1 (en) 1997-12-11
EP0844648A1 (en) 1998-05-27

Similar Documents

Publication Publication Date Title
EP0032801B1 (en) Method of dicing a semiconductor wafer
KR19990022039A (ko) 반도체칩및반도체칩의제조방법
US3771218A (en) Process for fabricating passivated transistors
US6107161A (en) Semiconductor chip and a method for manufacturing thereof
US5132252A (en) Method for fabricating semiconductor devices that prevents pattern contamination
US4073055A (en) Method for manufacturing semiconductor devices
JP2718901B2 (ja) 半導体装置の製造方法
JPH05267449A (ja) 半導体装置及びその製造方法
CN119560418B (zh) 半导体结构及其制作方法
US6249036B1 (en) Stepper alignment mark formation with dual field oxide process
CN113078119B (zh) 半导体结构的制作方法及半导体结构
US6218263B1 (en) Method of forming an alignment key on a semiconductor wafer
US20060148256A1 (en) Method for forming patterns aligned on either side of a thin film
JPH01214040A (ja) 半導体集積回路の製造方法
JPH07161684A (ja) 半導体装置の製造方法
JPH02162750A (ja) 半導体装置の製造方法
KR100356791B1 (ko) 반도체 소자의 퓨즈 형성 방법
JPS6347331B2 (https=)
KR0153616B1 (ko) 포토레지스터 에치 백 스텝의 안정화 방법
JP2025175636A (ja) 半導体チップの製造方法、ウェハ積層体、及び半導体チップ
JPH11340167A (ja) 半導体装置及びその製造方法
KR0138963B1 (ko) 금속배선 형성방법
KR100312654B1 (ko) 반도체 소자의 패턴구조
KR100252756B1 (ko) 반도체소자의설계기법의변경을통한오버랩마진향상방법
KR0140486B1 (ko) 레티컬 제작방법

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E601 Decision to refuse application
PE0601 Decision on rejection of patent

St.27 status event code: N-2-6-B10-B15-exm-PE0601

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000