KR102469539B1 - 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치 - Google Patents

비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치 Download PDF

Info

Publication number
KR102469539B1
KR102469539B1 KR1020170177848A KR20170177848A KR102469539B1 KR 102469539 B1 KR102469539 B1 KR 102469539B1 KR 1020170177848 A KR1020170177848 A KR 1020170177848A KR 20170177848 A KR20170177848 A KR 20170177848A KR 102469539 B1 KR102469539 B1 KR 102469539B1
Authority
KR
South Korea
Prior art keywords
block
sub
bad
memory
erase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020170177848A
Other languages
English (en)
Korean (ko)
Other versions
KR20190076228A (ko
Inventor
김승범
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020170177848A priority Critical patent/KR102469539B1/ko
Priority to US16/111,813 priority patent/US10712954B2/en
Priority to DE102018125128.9A priority patent/DE102018125128B4/de
Priority to CN201811248198.XA priority patent/CN109961819B/zh
Priority to JP2018226638A priority patent/JP7232628B2/ja
Publication of KR20190076228A publication Critical patent/KR20190076228A/ko
Priority to US16/892,512 priority patent/US11334250B2/en
Priority to US17/033,077 priority patent/US11294580B2/en
Application granted granted Critical
Publication of KR102469539B1 publication Critical patent/KR102469539B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0647Migration mechanisms
    • G06F3/0649Lifecycle management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • G06F3/0688Non-volatile semiconductor memory arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/30Power supply circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52Protection of memory contents; Detection of errors in memory contents
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5671Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411Online error correction
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/1206Location of test circuitry on chip or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
KR1020170177848A 2017-12-22 2017-12-22 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치 Active KR102469539B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1020170177848A KR102469539B1 (ko) 2017-12-22 2017-12-22 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치
US16/111,813 US10712954B2 (en) 2017-12-22 2018-08-24 Nonvolatile memory device, method of operating nonvolatile memory device and storage device including the same
DE102018125128.9A DE102018125128B4 (de) 2017-12-22 2018-10-11 Nichtflüchtige Speichervorrichtung, Verfahren zum Betreiben einer nichtflüchtigen Speichervorrichtung und Speichervorrichtung mit derselben
CN201811248198.XA CN109961819B (zh) 2017-12-22 2018-10-25 非易失性存储器装置及其操作方法以及包括其的存储装置
JP2018226638A JP7232628B2 (ja) 2017-12-22 2018-12-03 不揮発性メモリ装置、不揮発性メモリ装置の動作方法、及び貯蔵装置
US16/892,512 US11334250B2 (en) 2017-12-22 2020-06-04 Nonvolatile memory device, method of operating nonvolatile memory device and storage device including the same
US17/033,077 US11294580B2 (en) 2017-12-22 2020-09-25 Nonvolatile memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170177848A KR102469539B1 (ko) 2017-12-22 2017-12-22 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치

Publications (2)

Publication Number Publication Date
KR20190076228A KR20190076228A (ko) 2019-07-02
KR102469539B1 true KR102469539B1 (ko) 2022-11-22

Family

ID=66767971

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170177848A Active KR102469539B1 (ko) 2017-12-22 2017-12-22 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치

Country Status (5)

Country Link
US (2) US10712954B2 (enExample)
JP (1) JP7232628B2 (enExample)
KR (1) KR102469539B1 (enExample)
CN (1) CN109961819B (enExample)
DE (1) DE102018125128B4 (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102460526B1 (ko) * 2018-01-04 2022-11-01 삼성전자주식회사 불휘발성 메모리 장치를 포함하는 스토리지 장치, 불휘발성 메모리 장치, 그리고 스토리지 장치의 동작 방법
KR102596407B1 (ko) * 2018-03-13 2023-11-01 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
KR102840971B1 (ko) * 2019-05-17 2025-07-31 에스케이하이닉스 주식회사 메모리 시스템, 컨트롤러 및 컨트롤러의 동작 방법
KR102743810B1 (ko) 2019-06-10 2024-12-18 에스케이하이닉스 주식회사 반도체 장치 및 반도체 장치의 동작 방법
KR102716680B1 (ko) * 2019-09-20 2024-10-14 삼성전자주식회사 비휘발성 메모리 장치의 구동 방법 및 이를 수행하는 비휘발성 메모리 장치
KR102709627B1 (ko) * 2019-10-11 2024-09-26 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그의 제조 방법
US11487454B2 (en) * 2019-12-05 2022-11-01 Sandisk Technologies Llc Systems and methods for defining memory sub-blocks
KR102874903B1 (ko) * 2020-02-07 2025-10-23 에스케이하이닉스 주식회사 복수의 메모리 칩들을 갖는 반도체 메모리 장치
CN113299333B (zh) * 2020-02-21 2025-09-02 硅存储技术股份有限公司 由闪存单元构成的eeprom仿真器中的损耗均衡
US11562792B2 (en) * 2020-03-18 2023-01-24 Kioxia Corporation Memory system having a non-volatile memory and a controller configured to switch a mode for controlling an access operation to the non-volatile memory
KR102872948B1 (ko) 2020-04-03 2025-10-16 삼성전자주식회사 비휘발성 메모리 장치 및 이를 포함하는 저장장치 및 그 동작 방법
CN111564174A (zh) * 2020-04-23 2020-08-21 上海华虹宏力半导体制造有限公司 一种支持块擦除的数字冗余电路及其操作方法
KR20220020717A (ko) * 2020-08-12 2022-02-21 삼성전자주식회사 메모리 장치, 메모리 컨트롤러 및 이들을 포함하는 메모리 시스템
US11455244B2 (en) 2020-09-04 2022-09-27 Western Digital Technologies, Inc. Zoned namespace limitation mitigation using sub block mode
JP2022048489A (ja) 2020-09-15 2022-03-28 キオクシア株式会社 半導体記憶装置
US11475969B2 (en) * 2020-12-18 2022-10-18 Micron Technology, Inc. Scan optimization using data selection across wordline of a memory array
US11386968B1 (en) * 2021-01-14 2022-07-12 Sandisk Technologies Llc Memory apparatus and method of operation using plane dependent ramp rate and timing control for program operation
TWI766559B (zh) * 2021-01-26 2022-06-01 旺宏電子股份有限公司 記憶體裝置的操作方法
US11798625B2 (en) * 2021-09-08 2023-10-24 Sandisk Technologies Llc Program dependent biasing of unselected sub-blocks
CN120808833A (zh) * 2021-09-13 2025-10-17 长鑫存储技术有限公司 存储电路及存储器
US12002503B2 (en) 2021-09-13 2024-06-04 Changxin Memory Technologies, Inc. Memory circuit and memory
US11875842B2 (en) * 2021-11-09 2024-01-16 Sandisk Technologies Llc Systems and methods for staggering read operation of sub-blocks
US11798639B2 (en) * 2021-11-22 2023-10-24 Macronix International Co., Ltd. Memory device and operation method thereof
KR20250006538A (ko) 2023-07-04 2025-01-13 에스케이하이닉스 주식회사 배드 블록 검사를 수행하는 메모리 장치, 이의 동작하는 방법, 및 이와 통신하는 스토리지 컨트롤러의 동작하는 방법

Family Cites Families (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7254668B1 (en) 2002-10-28 2007-08-07 Sandisk Corporation Method and apparatus for grouping pages within a block
JP4220319B2 (ja) * 2003-07-04 2009-02-04 株式会社東芝 不揮発性半導体記憶装置およびそのサブブロック消去方法
JP4175991B2 (ja) 2003-10-15 2008-11-05 株式会社東芝 不揮発性半導体記憶装置
US7274596B2 (en) * 2004-06-30 2007-09-25 Micron Technology, Inc. Reduction of adjacent floating gate data pattern sensitivity
KR20060002190A (ko) * 2004-07-01 2006-01-09 주식회사 팬택앤큐리텔 조율 기능을 가진 이동 통신 단말기
US7804718B2 (en) 2007-03-07 2010-09-28 Mosaid Technologies Incorporated Partial block erase architecture for flash memory
JP2009015978A (ja) 2007-07-05 2009-01-22 Toshiba Corp 半導体記憶装置及びメモリシステム
US7945762B2 (en) * 2008-01-29 2011-05-17 Cadence Design Systems, Inc. Method and apparatus for memory management in a non-volatile memory system using a block table
JP2009266349A (ja) * 2008-04-28 2009-11-12 Toshiba Corp 不揮発性半導体記憶装置
JP2010130816A (ja) * 2008-11-28 2010-06-10 Panasonic Corp インバータ制御装置および空気調和機
US8495281B2 (en) 2009-12-04 2013-07-23 International Business Machines Corporation Intra-block memory wear leveling
US7990767B2 (en) * 2009-12-30 2011-08-02 Sandisk Il Ltd. Flash memory system having cross-coupling compensation during read operation
JP2010160816A (ja) 2010-03-29 2010-07-22 Toshiba Corp 半導体記憶装置の制御方法
US8769374B2 (en) 2010-10-13 2014-07-01 International Business Machines Corporation Multi-write endurance and error control coding of non-volatile memories
JP2012119013A (ja) 2010-11-29 2012-06-21 Toshiba Corp 不揮発性半導体記憶装置
US9007836B2 (en) 2011-01-13 2015-04-14 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR101751506B1 (ko) * 2011-03-28 2017-06-29 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 배드 영역 관리 방법
KR20120124285A (ko) 2011-05-03 2012-11-13 삼성전자주식회사 배드 블록 관리를 위한 방법 및 메모리 시스템
US8456911B2 (en) * 2011-06-07 2013-06-04 Sandisk Technologies Inc. Intelligent shifting of read pass voltages for non-volatile storage
US8902648B2 (en) * 2011-07-26 2014-12-02 Micron Technology, Inc. Dynamic program window determination in a memory device
KR101811035B1 (ko) 2011-09-30 2017-12-21 삼성전자주식회사 불휘발성 메모리 및 그것의 소거 방법
US8897070B2 (en) 2011-11-02 2014-11-25 Sandisk Technologies Inc. Selective word line erase in 3D non-volatile memory
WO2013095641A1 (en) 2011-12-23 2013-06-27 Intel Corporation Sub-block based wear leveling
KR101832934B1 (ko) * 2012-01-27 2018-02-28 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함하는 메모리 시스템, 그것의 블록 관리 방법, 프로그램 방법 및 소거 방법
US9081665B2 (en) * 2012-02-02 2015-07-14 OCZ Storage Solutions Inc. Apparatus, methods and architecture to increase write performance and endurance of non-volatile solid state memory components
KR20130100507A (ko) * 2012-03-02 2013-09-11 에스케이하이닉스 주식회사 비휘발성 메모리 장치의 소거 방법
US9362003B2 (en) * 2012-03-09 2016-06-07 Sandisk Technologies Inc. System and method to decode data subject to a disturb condition
US8788910B1 (en) * 2012-05-22 2014-07-22 Pmc-Sierra, Inc. Systems and methods for low latency, high reliability error correction in a flash drive
US8787088B2 (en) 2012-06-29 2014-07-22 Sandisk Technologies Inc. Optimized erase operation for non-volatile memory with partially programmed block
US9299439B2 (en) 2012-08-31 2016-03-29 Micron Technology, Inc. Erasable block segmentation for memory
KR101988434B1 (ko) 2012-08-31 2019-06-12 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 서브-블록 관리 방법
KR102015906B1 (ko) 2012-11-12 2019-08-29 삼성전자주식회사 불휘발성 메모리 장치를 포함하는 메모리 시스템 및 그것의 읽기 방법
US9466382B2 (en) 2012-11-14 2016-10-11 Sandisk Technologies Llc Compensation for sub-block erase
US9042181B2 (en) * 2013-03-15 2015-05-26 SanDisk Technologies, Inc. Periodic erase operation for a non-volatile medium
US9646705B2 (en) * 2013-06-12 2017-05-09 Samsung Electronics Co., Ltd. Memory systems including nonvolatile memory devices and dynamic access methods thereof
KR102108839B1 (ko) * 2013-06-12 2020-05-29 삼성전자주식회사 불휘발성 메모리 장치를 포함하는 사용자 장치 및 그것의 데이터 쓰기 방법
KR102085127B1 (ko) * 2013-11-13 2020-04-14 삼성전자주식회사 메모리 컨트롤러의 구동 방법 및 메모리 컨트롤러에 의해서 제어되는 비휘발성 메모리 장치
JP2015097136A (ja) 2013-11-15 2015-05-21 株式会社東芝 不揮発性半導体記憶装置、及び半導体装置
JP2015176624A (ja) * 2014-03-14 2015-10-05 株式会社東芝 半導体記憶装置
US9015561B1 (en) * 2014-06-11 2015-04-21 Sandisk Technologies Inc. Adaptive redundancy in three dimensional memory
US20160162185A1 (en) * 2014-12-05 2016-06-09 Sandisk Technologies Inc. Data programming for a memory having a three-dimensional memory configuration
US9740425B2 (en) * 2014-12-16 2017-08-22 Sandisk Technologies Llc Tag-based wear leveling for a data storage device
US10289480B2 (en) 2015-03-12 2019-05-14 Toshiba Memory Corporation Memory system
US9530517B2 (en) 2015-05-20 2016-12-27 Sandisk Technologies Llc Read disturb detection in open blocks
CN106558343B (zh) * 2015-09-24 2021-12-28 三星电子株式会社 操作非易失性存储装置的方法和非易失性存储装置
US10002073B2 (en) * 2015-11-06 2018-06-19 SK Hynix Inc. Selective data recycling in non-volatile memory
US9564233B1 (en) * 2016-03-04 2017-02-07 Sandisk Technologies Llc Open block source bias adjustment for an incompletely programmed block of a nonvolatile storage device

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
미국공개특허 제2006-0002190호(2006.01.05.) 1부.*
미국공개특허 제2011-0157981호(2011.06.30.) 1부.*
한국공개특허 제10-2012-0109244호(2012.10.08.) 1부.*
한국공개특허 제10-2013-0087230호(2013.08.06.) 1부.*
한국공개특허 제10-2015-0055445호(2015.05.21.) 1부.*

Also Published As

Publication number Publication date
US10712954B2 (en) 2020-07-14
US20190196744A1 (en) 2019-06-27
CN109961819A (zh) 2019-07-02
JP2019114320A (ja) 2019-07-11
US11334250B2 (en) 2022-05-17
CN109961819B (zh) 2024-07-19
DE102018125128A1 (de) 2019-06-27
JP7232628B2 (ja) 2023-03-03
KR20190076228A (ko) 2019-07-02
DE102018125128B4 (de) 2022-12-15
US20200293204A1 (en) 2020-09-17

Similar Documents

Publication Publication Date Title
KR102469539B1 (ko) 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치
KR102447152B1 (ko) 비휘발성 메모리 장치, 비휘발성 메모리 장치의 동작 방법 및 저장 장치
KR102718881B1 (ko) 비휘발성 메모리 장치의 동작 방법
CN107068186B (zh) 操作存储装置的方法
KR102606826B1 (ko) 비휘발성 메모리 장치 및 그 소거 방법
KR102139323B1 (ko) 불휘발성 메모리 장치 및 그것의 프로그램 방법
KR102222594B1 (ko) 비휘발성 메모리 장치, 그것의 소거 방법, 및 그것을 포함하는 메모리 시스템
CN107393589B (zh) 具有不同的伪字线的三维快闪存储器件和数据储存设备
KR102083547B1 (ko) 플래시 메모리와 메모리 컨트롤러를 포함하는 데이터 저장 장치 및 그것의 배드 페이지 관리 방법
KR102258117B1 (ko) 불휘발성 메모리 장치 및 그것의 소거 방법
KR102744707B1 (ko) 비휘발성 메모리 장치
JP2009020995A (ja) フラッシュメモリ装置及びそれのプログラム復旧方法
US10614887B2 (en) Nonvolatile memory device and method of programming the same
KR20130072665A (ko) 반도체 메모리 장치 및 이의 동작 방법
KR20150060144A (ko) 비휘발성 메모리 장치의 동작 방법
US11294580B2 (en) Nonvolatile memory device
CN108986861B (zh) 对非易失性存储器装置进行编程的方法
KR102825952B1 (ko) 적응적인 기록/독출 제어를 수행하는 스토리지 장치 및 스토리지 장치의 동작방법
US11941271B2 (en) Storage devices performing secure erase and operating methods thereof

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4