KR102185706B1 - 팬-아웃 반도체 패키지 - Google Patents

팬-아웃 반도체 패키지 Download PDF

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Publication number
KR102185706B1
KR102185706B1 KR1020180051254A KR20180051254A KR102185706B1 KR 102185706 B1 KR102185706 B1 KR 102185706B1 KR 1020180051254 A KR1020180051254 A KR 1020180051254A KR 20180051254 A KR20180051254 A KR 20180051254A KR 102185706 B1 KR102185706 B1 KR 102185706B1
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KR
South Korea
Prior art keywords
layer
fan
semiconductor chip
semiconductor package
disposed
Prior art date
Application number
KR1020180051254A
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English (en)
Korean (ko)
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KR20190052598A (ko
Inventor
오화섭
이두환
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to US16/057,023 priority Critical patent/US10643919B2/en
Priority to JP2018148939A priority patent/JP2019087731A/ja
Priority to TW107127573A priority patent/TWI695465B/zh
Priority to CN201811257876.9A priority patent/CN109755191B/zh
Publication of KR20190052598A publication Critical patent/KR20190052598A/ko
Application granted granted Critical
Publication of KR102185706B1 publication Critical patent/KR102185706B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0237—Disposition of the redistribution layers
    • H01L2224/02379—Fan-out arrangement

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020180051254A 2017-11-08 2018-05-03 팬-아웃 반도체 패키지 KR102185706B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US16/057,023 US10643919B2 (en) 2017-11-08 2018-08-07 Fan-out semiconductor package
JP2018148939A JP2019087731A (ja) 2017-11-08 2018-08-07 ファン−アウト半導体パッケージ
TW107127573A TWI695465B (zh) 2017-11-08 2018-08-08 扇出型半導體封裝
CN201811257876.9A CN109755191B (zh) 2017-11-08 2018-10-26 扇出型半导体封装件

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020170148216 2017-11-08
KR20170148216 2017-11-08

Publications (2)

Publication Number Publication Date
KR20190052598A KR20190052598A (ko) 2019-05-16
KR102185706B1 true KR102185706B1 (ko) 2020-12-02

Family

ID=66671934

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020180051254A KR102185706B1 (ko) 2017-11-08 2018-05-03 팬-아웃 반도체 패키지

Country Status (3)

Country Link
JP (1) JP2019087731A (zh)
KR (1) KR102185706B1 (zh)
TW (1) TWI695465B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102164794B1 (ko) 2018-08-27 2020-10-13 삼성전자주식회사 팬-아웃 반도체 패키지
KR102584991B1 (ko) * 2019-06-14 2023-10-05 삼성전기주식회사 반도체 패키지
KR102574409B1 (ko) * 2019-07-01 2023-09-04 삼성전기주식회사 반도체 패키지
KR20210078952A (ko) * 2019-12-19 2021-06-29 삼성전기주식회사 전자부품 내장기판
KR20210082969A (ko) 2019-12-26 2021-07-06 삼성전자주식회사 반도체 패키지
CN113395817B (zh) * 2020-03-13 2023-03-24 重庆达方电子有限公司 薄膜电路板

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009194189A (ja) * 2008-02-15 2009-08-27 Renesas Technology Corp 半導体装置およびその製造方法

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US5688716A (en) * 1994-07-07 1997-11-18 Tessera, Inc. Fan-out semiconductor chip assembly
JP2625398B2 (ja) * 1995-03-17 1997-07-02 日本電気株式会社 マルチチップ冷却装置
JP2002016173A (ja) * 2000-06-30 2002-01-18 Mitsubishi Electric Corp 半導体装置
JP2006269594A (ja) * 2005-03-23 2006-10-05 Cmk Corp 半導体装置及びその製造方法
JP4929784B2 (ja) * 2006-03-27 2012-05-09 富士通株式会社 多層配線基板、半導体装置およびソルダレジスト
JP5165207B2 (ja) * 2006-03-29 2013-03-21 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
JP2008210912A (ja) * 2007-02-26 2008-09-11 Cmk Corp 半導体装置及びその製造方法
US8217511B2 (en) * 2007-07-31 2012-07-10 Freescale Semiconductor, Inc. Redistributed chip packaging with thermal contact to device backside
TWI352410B (en) * 2007-10-31 2011-11-11 Chipmos Technologies Inc Cdim package structure with pre-setting fan out st
TWI358804B (en) * 2007-11-30 2012-02-21 Chipmos Technologies Inc Multichip package structure and the forming method
TWI345276B (en) * 2007-12-20 2011-07-11 Chipmos Technologies Inc Dice rearrangement package structure using layout process to form a compliant configuration
JP5224845B2 (ja) * 2008-02-18 2013-07-03 新光電気工業株式会社 半導体装置の製造方法及び半導体装置
TWI358808B (en) * 2008-03-20 2012-02-21 Chipmos Technologies Inc Chip package structure and the method thereof
CN102460685B (zh) * 2009-06-22 2014-08-06 三菱电机株式会社 半导体封装件以及该半导体封装件的安装构造
JP2011165741A (ja) * 2010-02-05 2011-08-25 Renesas Electronics Corp 半導体装置およびその製造方法
JP2011187473A (ja) * 2010-03-04 2011-09-22 Nec Corp 半導体素子内蔵配線基板
US20140175633A1 (en) * 2012-08-14 2014-06-26 Bridge Semiconductor Corporation Thermally enhanced semiconductor assembly with embedded chip and interposer and method of manufacturing the same
KR20140059514A (ko) * 2012-11-08 2014-05-16 한국전기연구원 투명 방열 코팅제 제조방법
CN103985695B (zh) * 2014-05-19 2017-07-25 中国科学院微电子研究所 一种扇出型封装结构及其制作工艺
JP2016025143A (ja) * 2014-07-17 2016-02-08 イビデン株式会社 回路基板及びその製造方法
KR102376119B1 (ko) * 2015-03-19 2022-03-17 인텔 코포레이션 이면 도전성 플레이트를 가진 무선 다이 패키지
CN105161466B (zh) * 2015-07-08 2018-04-17 华进半导体封装先导技术研发中心有限公司 高功率器件扇出型封装结构及生产工艺
KR20170121666A (ko) * 2016-04-25 2017-11-02 삼성전기주식회사 팬-아웃 반도체 패키지

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009194189A (ja) * 2008-02-15 2009-08-27 Renesas Technology Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
KR20190052598A (ko) 2019-05-16
TWI695465B (zh) 2020-06-01
JP2019087731A (ja) 2019-06-06
TW201919167A (zh) 2019-05-16

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