KR101975302B1 - 배선 기판 및 그 제조 방법 - Google Patents

배선 기판 및 그 제조 방법 Download PDF

Info

Publication number
KR101975302B1
KR101975302B1 KR1020130067810A KR20130067810A KR101975302B1 KR 101975302 B1 KR101975302 B1 KR 101975302B1 KR 1020130067810 A KR1020130067810 A KR 1020130067810A KR 20130067810 A KR20130067810 A KR 20130067810A KR 101975302 B1 KR101975302 B1 KR 101975302B1
Authority
KR
South Korea
Prior art keywords
layer
hole
wiring
electronic component
core layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020130067810A
Other languages
English (en)
Korean (ko)
Other versions
KR20130141384A (ko
Inventor
다카아키 고야나기
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20130141384A publication Critical patent/KR20130141384A/ko
Application granted granted Critical
Publication of KR101975302B1 publication Critical patent/KR101975302B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0038—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material combined with laser drilling through a metal layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
KR1020130067810A 2012-06-15 2013-06-13 배선 기판 및 그 제조 방법 Active KR101975302B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2012-136118 2012-06-15
JP2012136118A JP6029342B2 (ja) 2012-06-15 2012-06-15 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
KR20130141384A KR20130141384A (ko) 2013-12-26
KR101975302B1 true KR101975302B1 (ko) 2019-08-28

Family

ID=49754848

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130067810A Active KR101975302B1 (ko) 2012-06-15 2013-06-13 배선 기판 및 그 제조 방법

Country Status (3)

Country Link
US (1) US9161453B2 (enExample)
JP (1) JP6029342B2 (enExample)
KR (1) KR101975302B1 (enExample)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10886232B2 (en) 2019-05-10 2021-01-05 Applied Materials, Inc. Package structure and fabrication methods
US10937726B1 (en) 2019-11-27 2021-03-02 Applied Materials, Inc. Package structure with embedded core
US11063169B2 (en) 2019-05-10 2021-07-13 Applied Materials, Inc. Substrate structuring methods
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US12183684B2 (en) 2021-10-26 2024-12-31 Applied Materials, Inc. Semiconductor device packaging methods

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014027020A (ja) * 2012-07-24 2014-02-06 Toshiba Corp 回路基板、電子機器、および回路基板の製造方法
KR101472639B1 (ko) * 2012-12-31 2014-12-15 삼성전기주식회사 전자부품 내장기판 및 그 제조방법
KR102080663B1 (ko) * 2013-07-15 2020-02-24 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
JP6334962B2 (ja) * 2014-03-05 2018-05-30 新光電気工業株式会社 配線基板、及び、配線基板の製造方法
JP6373605B2 (ja) * 2014-03-05 2018-08-15 新光電気工業株式会社 配線基板、及び、配線基板の製造方法
KR20150144587A (ko) * 2014-06-17 2015-12-28 삼성전기주식회사 전자소자 내장기판 및 그 제조 방법
CN106576433B (zh) * 2014-07-25 2020-01-14 Lg 伊诺特有限公司 印刷电路板
TWI611523B (zh) * 2014-09-05 2018-01-11 矽品精密工業股份有限公司 半導體封裝件之製法
KR101609264B1 (ko) * 2014-12-09 2016-04-05 삼성전기주식회사 전자소자 내장 기판 및 그 제조 방법
KR102356810B1 (ko) * 2015-01-22 2022-01-28 삼성전기주식회사 전자부품내장형 인쇄회로기판 및 그 제조방법
JP6442123B2 (ja) * 2015-02-16 2018-12-19 日本特殊陶業株式会社 セラミック配線基板の製造方法
CN106783795A (zh) * 2015-11-20 2017-05-31 恒劲科技股份有限公司 封装基板
US10512174B2 (en) * 2016-02-15 2019-12-17 Rohm And Haas Electronic Materials Llc Method of filling through-holes to reduce voids and other defects
US20250079324A1 (en) * 2023-08-30 2025-03-06 Absolics Inc. Method of manufacturing packaging substrate and packaging substrate manufactured thereby
CN117939775A (zh) * 2024-02-21 2024-04-26 奥特斯奥地利科技与系统技术有限公司 部件承载件以及制造部件承载件的方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001298273A (ja) * 2000-04-17 2001-10-26 Hitachi Ltd 電子部品内蔵実装基板及びそれを用いた半導体パッケージ
JP2010157709A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd プリント配線板及びその製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54140972A (en) * 1978-04-25 1979-11-01 Matsushita Electric Industrial Co Ltd Printed circuit board and method of producing same
JPS5661191A (en) * 1979-10-24 1981-05-26 Alps Electric Co Ltd Electric part mounting board
JP2006073763A (ja) * 2004-09-01 2006-03-16 Denso Corp 多層基板の製造方法
US7542301B1 (en) * 2005-06-22 2009-06-02 Alien Technology Corporation Creating recessed regions in a substrate and assemblies having such recessed regions
US7876577B2 (en) * 2007-03-12 2011-01-25 Tyco Electronics Corporation System for attaching electronic components to molded interconnection devices
JP5074089B2 (ja) * 2007-04-27 2012-11-14 株式会社Ｊｖｃケンウッド 電子部品収容基板及びその製造方法
JP4988629B2 (ja) * 2008-03-12 2012-08-01 日立オートモティブシステムズ株式会社 電子機器および車載モジュール
JP5153417B2 (ja) * 2008-04-01 2013-02-27 京セラ株式会社 部品内蔵基板および実装構造体
US8925192B2 (en) * 2009-06-09 2015-01-06 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
JP5001395B2 (ja) 2010-03-31 2012-08-15 イビデン株式会社 配線板及び配線板の製造方法
US8610001B2 (en) * 2010-05-21 2013-12-17 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
US9049808B2 (en) * 2010-08-21 2015-06-02 Ibiden Co., Ltd. Printed wiring board and a method of manufacturing a printed wiring board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001298273A (ja) * 2000-04-17 2001-10-26 Hitachi Ltd 電子部品内蔵実装基板及びそれを用いた半導体パッケージ
JP2010157709A (ja) * 2008-12-29 2010-07-15 Ibiden Co Ltd プリント配線板及びその製造方法

Cited By (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11342256B2 (en) 2019-01-24 2022-05-24 Applied Materials, Inc. Method of fine redistribution interconnect formation for advanced packaging applications
US11521935B2 (en) 2019-05-10 2022-12-06 Applied Materials, Inc. Package structure and fabrication methods
US11476202B2 (en) 2019-05-10 2022-10-18 Applied Materials, Inc. Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
US11715700B2 (en) 2019-05-10 2023-08-01 Applied Materials, Inc. Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
US10886232B2 (en) 2019-05-10 2021-01-05 Applied Materials, Inc. Package structure and fabrication methods
US11264331B2 (en) 2019-05-10 2022-03-01 Applied Materials, Inc. Package structure and fabrication methods
US11264333B2 (en) 2019-05-10 2022-03-01 Applied Materials, Inc. Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
US12354968B2 (en) 2019-05-10 2025-07-08 Applied Materials, Inc. Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
US11362235B2 (en) 2019-05-10 2022-06-14 Applied Materials, Inc. Substrate structuring methods
US11398433B2 (en) 2019-05-10 2022-07-26 Applied Materials, Inc. Reconstituted substrate structure and fabrication methods for heterogeneous packaging integration
US12051653B2 (en) 2019-05-10 2024-07-30 Applied Materials, Inc. Reconstituted substrate for radio frequency applications
US11063169B2 (en) 2019-05-10 2021-07-13 Applied Materials, Inc. Substrate structuring methods
US11417605B2 (en) 2019-05-10 2022-08-16 Applied Materials, Inc. Reconstituted substrate for radio frequency applications
US11887934B2 (en) 2019-05-10 2024-01-30 Applied Materials, Inc. Package structure and fabrication methods
US11931855B2 (en) 2019-06-17 2024-03-19 Applied Materials, Inc. Planarization methods for packaging substrates
US12374611B2 (en) 2019-11-27 2025-07-29 Applied Materials, Inc. Package core assembly and fabrication methods
US12087679B2 (en) 2019-11-27 2024-09-10 Applied Materials, Inc. Package core assembly and fabrication methods
US10937726B1 (en) 2019-11-27 2021-03-02 Applied Materials, Inc. Package structure with embedded core
US11862546B2 (en) 2019-11-27 2024-01-02 Applied Materials, Inc. Package core assembly and fabrication methods
US11881447B2 (en) 2019-11-27 2024-01-23 Applied Materials, Inc. Package core assembly and fabrication methods
US11257790B2 (en) 2020-03-10 2022-02-22 Applied Materials, Inc. High connectivity device stacking
US12388049B2 (en) 2020-03-10 2025-08-12 Applied Materials, Inc. High connectivity device stacking
US11742330B2 (en) 2020-03-10 2023-08-29 Applied Materials, Inc. High connectivity device stacking
US11927885B2 (en) 2020-04-15 2024-03-12 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11454884B2 (en) 2020-04-15 2022-09-27 Applied Materials, Inc. Fluoropolymer stamp fabrication method
US11400545B2 (en) 2020-05-11 2022-08-02 Applied Materials, Inc. Laser ablation for package fabrication
US12358073B2 (en) 2020-07-14 2025-07-15 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11232951B1 (en) 2020-07-14 2022-01-25 Applied Materials, Inc. Method and apparatus for laser drilling blind vias
US11676832B2 (en) 2020-07-24 2023-06-13 Applied Materials, Inc. Laser ablation system for package fabrication
US12518986B2 (en) 2020-07-24 2026-01-06 Applied Materials, Inc. Laser ablation system for package fabrication
US11521937B2 (en) 2020-11-16 2022-12-06 Applied Materials, Inc. Package structures with built-in EMI shielding
US11404318B2 (en) 2020-11-20 2022-08-02 Applied Materials, Inc. Methods of forming through-silicon vias in substrates for advanced packaging
US12374586B2 (en) 2020-11-20 2025-07-29 Applied Materials, Inc. Methods of TSV formation for advanced packaging
US11705365B2 (en) 2021-05-18 2023-07-18 Applied Materials, Inc. Methods of micro-via formation for advanced packaging
US12183684B2 (en) 2021-10-26 2024-12-31 Applied Materials, Inc. Semiconductor device packaging methods

Also Published As

Publication number Publication date
JP2014003087A (ja) 2014-01-09
US9161453B2 (en) 2015-10-13
JP6029342B2 (ja) 2016-11-24
US20130333930A1 (en) 2013-12-19
KR20130141384A (ko) 2013-12-26

Similar Documents

Publication Publication Date Title
KR101975302B1 (ko) 배선 기판 및 그 제조 방법
CN102170745B (zh) 多层布线板及其制造方法
US8035033B2 (en) Wiring substrate with plurality of wiring and insulating layers with a solder resist layer covering a wiring layer on the outside of outer insulating layer but exposing the holes in the outer insulating layer
US9516753B2 (en) Wiring substrate and method for manufacturing wiring substrate
US8736073B2 (en) Semiconductor device
JP6997670B2 (ja) 配線基板及びその製造方法
US9997474B2 (en) Wiring board and semiconductor device
JP7064349B2 (ja) 配線基板及びその製造方法
JP7253946B2 (ja) 配線基板及びその製造方法、半導体パッケージ
US9232641B2 (en) Wiring board and method of manufacturing the same
KR20140041345A (ko) 배선 기판
JP2016058472A (ja) 電子部品内蔵配線板及びその製造方法
JP4769022B2 (ja) 配線基板およびその製造方法
JP2016035987A (ja) 電子部品内蔵配線板及びその製造方法
JP7046639B2 (ja) 配線基板及びその製造方法
KR101385924B1 (ko) 배선판 및 배선판의 제조 방법
US8658905B2 (en) Multilayer wiring substrate
KR102394215B1 (ko) 캐리어 기재 부착 배선 기판 및 캐리어 기재 부착 배선 기판의 제조 방법
CN100527921C (zh) 多层基板的制造方法
US20160189979A1 (en) Method for producing wiring board
JP2016033975A (ja) 電子部品内蔵配線板およびその製造方法
JP2019121764A (ja) 配線板およびその製造方法
JP2018006712A (ja) 配線基板及びその製造方法
JP5501204B2 (ja) 支持基板、該支持基板の製造方法及び多層配線基板の製造方法
US11749596B2 (en) Wiring substrate

Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20130613

PG1501 Laying open of application
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20171011

Comment text: Request for Examination of Application

Patent event code: PA02011R01I

Patent event date: 20130613

Comment text: Patent Application

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 20181105

Patent event code: PE09021S01D

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20190405

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 20190429

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 20190430

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20220323

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20240319

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 20250317

Start annual number: 7

End annual number: 7