KR101956563B1 - 배선 기판 및 그 제조 방법 - Google Patents

배선 기판 및 그 제조 방법 Download PDF

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Publication number
KR101956563B1
KR101956563B1 KR1020130117152A KR20130117152A KR101956563B1 KR 101956563 B1 KR101956563 B1 KR 101956563B1 KR 1020130117152 A KR1020130117152 A KR 1020130117152A KR 20130117152 A KR20130117152 A KR 20130117152A KR 101956563 B1 KR101956563 B1 KR 101956563B1
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South Korea
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layer
metal layer
metal
hole
core
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Korean (ko)
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KR20140044746A (ko
Inventor
고이치 하라
도시히사 요다
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신꼬오덴기 고교 가부시키가이샤
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854Hole or via having special cross-section, e.g. elliptical
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0779Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
    • H05K2203/0786Using an aqueous solution, e.g. for cleaning or during drilling of holes
    • H05K2203/0789Aqueous acid solution, e.g. for cleaning or etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/30Foil or other thin sheet-metal making or treating
    • Y10T29/301Method
    • Y10T29/302Clad or other composite foil or thin metal making
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
KR1020130117152A 2012-10-05 2013-10-01 배선 기판 및 그 제조 방법 Active KR101956563B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2012-223502 2012-10-05
JP2012223502A JP6114527B2 (ja) 2012-10-05 2012-10-05 配線基板及びその製造方法

Publications (2)

Publication Number Publication Date
KR20140044746A KR20140044746A (ko) 2014-04-15
KR101956563B1 true KR101956563B1 (ko) 2019-03-11

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Country Status (3)

Country Link
US (1) US9516753B2 (https=)
JP (1) JP6114527B2 (https=)
KR (1) KR101956563B1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210065347A (ko) * 2019-11-27 2021-06-04 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
WO2022164279A1 (ko) * 2021-02-01 2022-08-04 엘지이노텍 주식회사 반도체 패키지

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014127623A (ja) * 2012-12-27 2014-07-07 Shinko Electric Ind Co Ltd 配線基板及び配線基板の製造方法
TW201505493A (zh) * 2013-07-17 2015-02-01 Ichia Tech Inc 前驅基板、軟性印刷電路板的製造方法及前驅基板
CN104409364B (zh) * 2014-11-19 2017-12-01 清华大学 转接板及其制作方法、封装结构及用于转接板的键合方法
JP6870608B2 (ja) * 2015-02-23 2021-05-12 凸版印刷株式会社 印刷配線板及びその製造方法
JP7219598B2 (ja) * 2018-11-27 2023-02-08 新光電気工業株式会社 配線基板及びその製造方法
JP7217142B2 (ja) * 2018-12-19 2023-02-02 日本特殊陶業株式会社 配線基板およびその製造方法
CN111508925B (zh) * 2019-01-31 2024-04-23 奥特斯奥地利科技与系统技术有限公司 部件承载件以及制造部件承载件的方法
CN111511102B (zh) * 2019-01-31 2023-12-15 奥特斯奥地利科技与系统技术有限公司 在通孔中具有符合最小距离设计原则的桥结构的部件承载件
KR102564761B1 (ko) 2019-03-07 2023-08-07 앱솔릭스 인코포레이티드 패키징 기판 및 이를 포함하는 반도체 장치
CN113261094B (zh) 2019-03-07 2024-04-16 爱玻索立克公司 封装基板及包括其的半导体装置
US11967542B2 (en) 2019-03-12 2024-04-23 Absolics Inc. Packaging substrate, and semiconductor device comprising same
US11652039B2 (en) 2019-03-12 2023-05-16 Absolics Inc. Packaging substrate with core layer and cavity structure and semiconductor device comprising the same
KR102537004B1 (ko) 2019-03-12 2023-05-26 앱솔릭스 인코포레이티드 패키징 기판 및 이의 제조방법
US11981501B2 (en) 2019-03-12 2024-05-14 Absolics Inc. Loading cassette for substrate including glass and substrate loading method to which same is applied
CN114678344B (zh) 2019-03-29 2025-08-15 爱玻索立克公司 半导体用封装玻璃基板、半导体封装基板及半导体装置
EP4018790A1 (en) * 2019-08-19 2022-06-29 Atotech Deutschland GmbH & Co. KG Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board
JP7104245B2 (ja) 2019-08-23 2022-07-20 アブソリックス インコーポレイテッド パッケージング基板及びこれを含む半導体装置
CN119815685A (zh) * 2019-09-27 2025-04-11 奥特斯奥地利科技与系统技术有限公司 部件承载件和制造部件承载件的方法
KR102908327B1 (ko) * 2020-06-30 2026-01-05 삼성전기주식회사 인쇄회로기판
US12525496B2 (en) * 2021-12-21 2026-01-13 Intel Corporation Glass vias and planes with reduced tapering
WO2023184401A1 (zh) * 2022-03-31 2023-10-05 京东方科技集团股份有限公司 基板及其制备方法、集成无源器件、电子装置
CN121215645A (zh) * 2024-06-25 2025-12-26 北京京东方光电科技有限公司 基板及其制备方法、集成无源器件、电子装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009038390A (ja) 2008-09-29 2009-02-19 Ibiden Co Ltd 多層プリント配線板の製造方法
WO2011062037A1 (ja) 2009-11-20 2011-05-26 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
US20110155439A1 (en) 2009-12-24 2011-06-30 Shinko Electric Industries Co., Ltd. Multilayer wiring substrate and method of manufacturing the same

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2347217A1 (de) * 1973-09-19 1975-03-27 Siemens Ag Verfahren zum durchkontaktieren eines beidseitig metallkaschierten basismaterials fuer gedruckte schaltungen
JPH0691311B2 (ja) * 1986-08-22 1994-11-14 富士通株式会社 中空多層用プリント板の製造方法
JP2002324958A (ja) * 2001-04-25 2002-11-08 Sony Corp プリント配線板と、その製造方法
DE10122565B4 (de) 2001-05-10 2010-01-14 Allmann, Ludwig Verfahren zum Sanieren von Rohrleitungen
JP3956204B2 (ja) * 2002-06-27 2007-08-08 日本特殊陶業株式会社 積層樹脂配線基板及びその製造方法、積層樹脂配線基板用金属板
JP2004311919A (ja) * 2003-02-21 2004-11-04 Shinko Electric Ind Co Ltd スルーホールフィル方法
DE102004045451B4 (de) * 2004-09-20 2007-05-03 Atotech Deutschland Gmbh Galvanisches Verfahren zum Füllen von Durchgangslöchern mit Metallen, insbesondere von Leiterplatten mit Kupfer
CN101785103B (zh) * 2007-07-05 2011-12-28 Aac微技术有限公司 低阻抗晶圆穿孔
US8541695B2 (en) * 2010-02-26 2013-09-24 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
US8595927B2 (en) * 2011-03-17 2013-12-03 Ibiden Co., Ltd. Method for manufacturing multilayer printed wiring board
JP2012212867A (ja) * 2011-03-30 2012-11-01 Ibiden Co Ltd プリント配線板及びその製造方法
JP6385635B2 (ja) * 2012-05-28 2018-09-05 新光電気工業株式会社 配線基板の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009038390A (ja) 2008-09-29 2009-02-19 Ibiden Co Ltd 多層プリント配線板の製造方法
WO2011062037A1 (ja) 2009-11-20 2011-05-26 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
US20110155439A1 (en) 2009-12-24 2011-06-30 Shinko Electric Industries Co., Ltd. Multilayer wiring substrate and method of manufacturing the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210065347A (ko) * 2019-11-27 2021-06-04 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
WO2021107654A3 (ko) * 2019-11-27 2021-07-22 엘지이노텍 주식회사 인쇄회로기판
US12108531B2 (en) 2019-11-27 2024-10-01 Lg Innotek Co., Ltd. Circuit board comprising via
KR102777247B1 (ko) * 2019-11-27 2025-03-10 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
TWI893024B (zh) * 2019-11-27 2025-08-11 韓商Lg伊諾特股份有限公司 印刷電路板
WO2022164279A1 (ko) * 2021-02-01 2022-08-04 엘지이노텍 주식회사 반도체 패키지

Also Published As

Publication number Publication date
US20140097013A1 (en) 2014-04-10
JP2014075548A (ja) 2014-04-24
JP6114527B2 (ja) 2017-04-12
US9516753B2 (en) 2016-12-06
KR20140044746A (ko) 2014-04-15

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