KR101484296B1 - 반도체 기판의 제작방법 - Google Patents

반도체 기판의 제작방법 Download PDF

Info

Publication number
KR101484296B1
KR101484296B1 KR20080052126A KR20080052126A KR101484296B1 KR 101484296 B1 KR101484296 B1 KR 101484296B1 KR 20080052126 A KR20080052126 A KR 20080052126A KR 20080052126 A KR20080052126 A KR 20080052126A KR 101484296 B1 KR101484296 B1 KR 101484296B1
Authority
KR
South Korea
Prior art keywords
single crystal
crystal semiconductor
substrate
insulating layer
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR20080052126A
Other languages
English (en)
Korean (ko)
Other versions
KR20080114512A (ko
Inventor
사토시 무라카미
히로미치 고도
아츠오 이소베
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 가부시키가이샤 한도오따이 에네루기 켄큐쇼
Publication of KR20080114512A publication Critical patent/KR20080114512A/ko
Application granted granted Critical
Publication of KR101484296B1 publication Critical patent/KR101484296B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
KR20080052126A 2007-06-26 2008-06-03 반도체 기판의 제작방법 Expired - Fee Related KR101484296B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007167356 2007-06-26
JPJP-P-2007-00167356 2007-06-26

Publications (2)

Publication Number Publication Date
KR20080114512A KR20080114512A (ko) 2008-12-31
KR101484296B1 true KR101484296B1 (ko) 2015-01-19

Family

ID=40161087

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20080052126A Expired - Fee Related KR101484296B1 (ko) 2007-06-26 2008-06-03 반도체 기판의 제작방법

Country Status (3)

Country Link
US (1) US7867873B2 (https=)
JP (1) JP5459987B2 (https=)
KR (1) KR101484296B1 (https=)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10260149A1 (de) * 2002-12-20 2004-07-01 BSH Bosch und Siemens Hausgeräte GmbH Vorrichtung zur Bestimmung des Leitwertes von Wäsche, Wäschetrockner und Verfahren zur Verhinderung von Schichtbildung auf Elektroden
CN101281912B (zh) 2007-04-03 2013-01-23 株式会社半导体能源研究所 Soi衬底及其制造方法以及半导体装置
JP5490393B2 (ja) * 2007-10-10 2014-05-14 株式会社半導体エネルギー研究所 半導体基板の製造方法
JP5527956B2 (ja) * 2007-10-10 2014-06-25 株式会社半導体エネルギー研究所 半導体基板の製造方法
JP5503876B2 (ja) * 2008-01-24 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の製造方法
JP5548395B2 (ja) * 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
US8741740B2 (en) * 2008-10-02 2014-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP2010114431A (ja) * 2008-10-10 2010-05-20 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
JP5338396B2 (ja) * 2009-03-12 2013-11-13 パナソニック株式会社 弾性表面波デバイスの製造方法
KR20120059509A (ko) * 2009-08-25 2012-06-08 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
US8324084B2 (en) * 2010-03-31 2012-12-04 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor substrate and manufacturing method of semiconductor device
JP5917036B2 (ja) 2010-08-05 2016-05-11 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
TWI500118B (zh) 2010-11-12 2015-09-11 半導體能源研究所股份有限公司 半導體基底之製造方法
JP2012156495A (ja) 2011-01-07 2012-08-16 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US8802534B2 (en) 2011-06-14 2014-08-12 Semiconductor Energy Laboratory Co., Ltd. Method for forming SOI substrate and apparatus for forming the same
US8735219B2 (en) 2012-08-30 2014-05-27 Ziptronix, Inc. Heterogeneous annealing method and device
JP5859496B2 (ja) * 2013-08-22 2016-02-10 信越化学工業株式会社 表面欠陥密度が少ないｓｏｓ基板の製造方法
JP5859497B2 (ja) * 2013-08-22 2016-02-10 信越化学工業株式会社 界面近傍における欠陥密度が低いｓｏｓ基板の製造方法
JP6396853B2 (ja) 2015-06-02 2018-09-26 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6454606B2 (ja) 2015-06-02 2019-01-16 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
JP6396852B2 (ja) * 2015-06-02 2018-09-26 信越化学工業株式会社 酸化物単結晶薄膜を備えた複合ウェーハの製造方法
WO2020010056A1 (en) 2018-07-03 2020-01-09 Invensas Bonding Technologies, Inc. Techniques for joining dissimilar materials in microelectronics
KR20220107219A (ko) * 2019-11-25 2022-08-02 코닝 인코포레이티드 접합 물품 및 이를 형성하는 방법
US11081393B2 (en) * 2019-12-09 2021-08-03 Infineon Technologies Ag Method for splitting semiconductor wafers
CN115943489A (zh) 2020-03-19 2023-04-07 隔热半导体粘合技术公司 用于直接键合结构的尺寸补偿控制
CN113541626B (zh) * 2020-04-21 2025-07-22 济南晶正电子科技有限公司 一种复合单晶压电基板及制备方法
CN111477543A (zh) * 2020-04-23 2020-07-31 济南晶正电子科技有限公司 一种键合衬底晶圆与单晶压电晶圆的方法及复合单晶压电晶圆基板
DE102021110742B4 (de) 2021-04-27 2025-01-16 Infineon Technologies Ag Verfahren zum teilen von halbleiterwerkstücken, halbleiterwerkstück und gerät zum definieren eines trennbereichs in halbleiterwerkstücken
US12136691B2 (en) * 2022-01-18 2024-11-05 Apple Inc. System with one-way filter over light-emitting elements

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335530A (ja) * 1992-05-28 1993-12-17 Sony Corp Ｓｏｉ基板の製造方法
JP2005252244A (ja) 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法
JP2006505941A (ja) 2002-11-07 2006-02-16 コミサリヤ・ア・レネルジ・アトミク 同時注入により基板内に脆性領域を生成する方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0834198B2 (ja) * 1990-11-28 1996-03-29 信越半導体株式会社 Ｓｏｉ基板における単結晶薄膜層の膜厚制御方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6014944A (en) * 1997-09-19 2000-01-18 The United States Of America As Represented By The Secretary Of The Navy Apparatus for improving crystalline thin films with a contoured beam pulsed laser
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
JP4379943B2 (ja) 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
TW544727B (en) * 1999-08-13 2003-08-01 Semiconductor Energy Lab Method of manufacturing a semiconductor device
US6548370B1 (en) 1999-08-18 2003-04-15 Semiconductor Energy Laboratory Co., Ltd. Method of crystallizing a semiconductor layer by applying laser irradiation that vary in energy to its top and bottom surfaces
JP4919530B2 (ja) 1999-08-18 2012-04-18 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20010053559A1 (en) * 2000-01-25 2001-12-20 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating display device
JP4507395B2 (ja) * 2000-11-30 2010-07-21 セイコーエプソン株式会社 電気光学装置用素子基板の製造方法
TW544938B (en) 2001-06-01 2003-08-01 Semiconductor Energy Lab Method of manufacturing a semiconductor device
US6887650B2 (en) * 2001-07-24 2005-05-03 Seiko Epson Corporation Transfer method, method of manufacturing thin film devices, method of manufacturing integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, ic card, and electronic appliance
US7119365B2 (en) 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
JP2004087097A (ja) * 2002-06-28 2004-03-18 Victor Co Of Japan Ltd 光記録媒体
JP4328067B2 (ja) * 2002-07-31 2009-09-09 アプライド マテリアルズ インコーポレイテッド イオン注入方法及びｓｏｉウエハの製造方法、並びにイオン注入装置
JP4759919B2 (ja) 2004-01-16 2011-08-31 セイコーエプソン株式会社 電気光学装置の製造方法
US7410882B2 (en) * 2004-09-28 2008-08-12 Palo Alto Research Center Incorporated Method of manufacturing and structure of polycrystalline semiconductor thin-film heterostructures on dissimilar substrates
US7148124B1 (en) * 2004-11-18 2006-12-12 Alexander Yuri Usenko Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers
US20070281440A1 (en) * 2006-05-31 2007-12-06 Jeffrey Scott Cites Producing SOI structure using ion shower
KR101440930B1 (ko) 2007-04-20 2014-09-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Ｓｏｉ 기판의 제작방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05335530A (ja) * 1992-05-28 1993-12-17 Sony Corp Ｓｏｉ基板の製造方法
JP2006505941A (ja) 2002-11-07 2006-02-16 コミサリヤ・ア・レネルジ・アトミク 同時注入により基板内に脆性領域を生成する方法
JP2005252244A (ja) 2004-02-03 2005-09-15 Ishikawajima Harima Heavy Ind Co Ltd 半導体基板の製造方法

Also Published As

Publication number Publication date
JP2009033135A (ja) 2009-02-12
JP5459987B2 (ja) 2014-04-02
US20090004822A1 (en) 2009-01-01
KR20080114512A (ko) 2008-12-31
US7867873B2 (en) 2011-01-11

Similar Documents

Publication Publication Date Title
KR101484296B1 (ko) 반도체 기판의 제작방법
US8273611B2 (en) Method for manufacturing semiconductor substrate
US8368082B2 (en) Method for manufacturing semiconductor device, semiconductor device and electronic appliance
US8049253B2 (en) Semiconductor device and method for manufacturing the same
US8309429B2 (en) Method for manufacturing semiconductor substrate and semiconductor device
US7851332B2 (en) Semiconductor device and method for manufacturing the same
US7816232B2 (en) Method for manufacturing semiconductor substrate and semiconductor substrate manufacturing apparatus
KR20100096053A (ko) 반도체 기판의 제작 방법 및 반도체 장치의 제작 방법
KR20090037312A (ko) 반도체 장치의 제작 방법
US7790563B2 (en) Semiconductor device, electronic device and method for manufacturing semiconductor device
US7816234B2 (en) Method for manufacturing semiconductor device
US8278740B2 (en) Method for manufacturing semiconductor device, semiconductor device, and electronic appliance
US8236630B2 (en) Manufacturing method of semiconductor device, semiconductor device, and electronic device

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20171219

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20190114

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20190114

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000