KR100855573B1 - 상부 컨덕터 클래딩 방법, 강자성 클래딩 제조 방법 및자기 메모리 장치 - Google Patents

상부 컨덕터 클래딩 방법, 강자성 클래딩 제조 방법 및자기 메모리 장치 Download PDF

Info

Publication number
KR100855573B1
KR100855573B1 KR1020020012376A KR20020012376A KR100855573B1 KR 100855573 B1 KR100855573 B1 KR 100855573B1 KR 1020020012376 A KR1020020012376 A KR 1020020012376A KR 20020012376 A KR20020012376 A KR 20020012376A KR 100855573 B1 KR100855573 B1 KR 100855573B1
Authority
KR
South Korea
Prior art keywords
trench
conductor
ferromagnetic
cladding
coating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020020012376A
Other languages
English (en)
Korean (ko)
Other versions
KR20030009078A (ko
Inventor
니켈자니스에이치
안토니토마스씨
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Publication of KR20030009078A publication Critical patent/KR20030009078A/ko
Application granted granted Critical
Publication of KR100855573B1 publication Critical patent/KR100855573B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
KR1020020012376A 2001-03-09 2002-03-08 상부 컨덕터 클래딩 방법, 강자성 클래딩 제조 방법 및자기 메모리 장치 Expired - Fee Related KR100855573B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/802,650 2001-03-09
US09/802,650 US6475812B2 (en) 2001-03-09 2001-03-09 Method for fabricating cladding layer in top conductor

Publications (2)

Publication Number Publication Date
KR20030009078A KR20030009078A (ko) 2003-01-29
KR100855573B1 true KR100855573B1 (ko) 2008-09-03

Family

ID=25184320

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020012376A Expired - Fee Related KR100855573B1 (ko) 2001-03-09 2002-03-08 상부 컨덕터 클래딩 방법, 강자성 클래딩 제조 방법 및자기 메모리 장치

Country Status (8)

Country Link
US (1) US6475812B2 (enExample)
EP (1) EP1239489B1 (enExample)
JP (1) JP2002334973A (enExample)
KR (1) KR100855573B1 (enExample)
CN (1) CN1374691A (enExample)
DE (1) DE60201036T2 (enExample)
HK (1) HK1049067A1 (enExample)
TW (1) TW513803B (enExample)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10043947A1 (de) * 2000-09-06 2002-04-04 Infineon Technologies Ag Integrierte Schaltungsanordnung
US6555858B1 (en) * 2000-11-15 2003-04-29 Motorola, Inc. Self-aligned magnetic clad write line and its method of formation
US6413788B1 (en) * 2001-02-28 2002-07-02 Micron Technology, Inc. Keepers for MRAM electrodes
US6545906B1 (en) 2001-10-16 2003-04-08 Motorola, Inc. Method of writing to scalable magnetoresistance random access memory element
US6720597B2 (en) * 2001-11-13 2004-04-13 Motorola, Inc. Cladding of a conductive interconnect for programming a MRAM device using multiple magnetic layers
US6661688B2 (en) * 2001-12-05 2003-12-09 Hewlett-Packard Development Company, L.P. Method and article for concentrating fields at sense layers
US6525957B1 (en) * 2001-12-21 2003-02-25 Motorola, Inc. Magnetic memory cell having magnetic flux wrapping around a bit line and method of manufacturing thereof
US6780653B2 (en) 2002-06-06 2004-08-24 Micron Technology, Inc. Methods of forming magnetoresistive memory device assemblies
US7095646B2 (en) 2002-07-17 2006-08-22 Freescale Semiconductor, Inc. Multi-state magnetoresistance random access cell with improved memory storage density
JP2006134363A (ja) * 2002-07-29 2006-05-25 Nec Corp 磁気ランダムアクセスメモリ
US6770491B2 (en) * 2002-08-07 2004-08-03 Micron Technology, Inc. Magnetoresistive memory and method of manufacturing the same
US6914805B2 (en) * 2002-08-21 2005-07-05 Micron Technology, Inc. Method for building a magnetic keeper or flux concentrator used for writing magnetic bits on a MRAM device
KR100515053B1 (ko) * 2002-10-02 2005-09-14 삼성전자주식회사 비트라인 클램핑 전압 레벨에 대해 안정적인 독출 동작이가능한 마그네틱 메모리 장치
JP3906145B2 (ja) * 2002-11-22 2007-04-18 株式会社東芝 磁気ランダムアクセスメモリ
US7184301B2 (en) 2002-11-27 2007-02-27 Nec Corporation Magnetic memory cell and magnetic random access memory using the same
US6885074B2 (en) * 2002-11-27 2005-04-26 Freescale Semiconductor, Inc. Cladded conductor for use in a magnetoelectronics device and method for fabricating the same
US6870759B2 (en) * 2002-12-09 2005-03-22 Applied Spintronics Technology, Inc. MRAM array with segmented magnetic write lines
US6909630B2 (en) 2002-12-09 2005-06-21 Applied Spintronics Technology, Inc. MRAM memories utilizing magnetic write lines
US6909633B2 (en) 2002-12-09 2005-06-21 Applied Spintronics Technology, Inc. MRAM architecture with a flux closed data storage layer
US6943038B2 (en) * 2002-12-19 2005-09-13 Freescale Semiconductor, Inc. Method for fabricating a flux concentrating system for use in a magnetoelectronics device
US6864551B2 (en) * 2003-02-05 2005-03-08 Applied Spintronics Technology, Inc. High density and high programming efficiency MRAM design
US6812538B2 (en) 2003-02-05 2004-11-02 Applied Spintronics Technology, Inc. MRAM cells having magnetic write lines with a stable magnetic state at the end regions
US6940749B2 (en) 2003-02-24 2005-09-06 Applied Spintronics Technology, Inc. MRAM array with segmented word and bit lines
US6963500B2 (en) * 2003-03-14 2005-11-08 Applied Spintronics Technology, Inc. Magnetic tunneling junction cell array with shared reference layer for MRAM applications
US6933550B2 (en) * 2003-03-31 2005-08-23 Applied Spintronics Technology, Inc. Method and system for providing a magnetic memory having a wrapped write line
US7067866B2 (en) * 2003-03-31 2006-06-27 Applied Spintronics Technology, Inc. MRAM architecture and a method and system for fabricating MRAM memories utilizing the architecture
US6785160B1 (en) * 2003-04-29 2004-08-31 Hewlett-Packard Development Company, L.P. Method of providing stability of a magnetic memory cell
US6956763B2 (en) 2003-06-27 2005-10-18 Freescale Semiconductor, Inc. MRAM element and methods for writing the MRAM element
US6967366B2 (en) 2003-08-25 2005-11-22 Freescale Semiconductor, Inc. Magnetoresistive random access memory with reduced switching field variation
US7078239B2 (en) 2003-09-05 2006-07-18 Micron Technology, Inc. Integrated circuit structure formed by damascene process
US6819586B1 (en) * 2003-10-24 2004-11-16 Hewlett-Packard Development Company, L.P. Thermally-assisted magnetic memory structures
US20050141148A1 (en) 2003-12-02 2005-06-30 Kabushiki Kaisha Toshiba Magnetic memory
US20050205952A1 (en) * 2004-03-19 2005-09-22 Jae-Hyun Park Magnetic random access memory cells having split sub-digit lines having cladding layers thereon and methods of fabricating the same
US6946698B1 (en) 2004-04-02 2005-09-20 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM device having low-k inter-metal dielectric
US20060039183A1 (en) * 2004-05-21 2006-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-sensing level MRAM structures
WO2005122259A1 (ja) * 2004-06-10 2005-12-22 Nec Corporation 磁気メモリ
US7221584B2 (en) * 2004-08-13 2007-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM cell having shared configuration
US7129098B2 (en) 2004-11-24 2006-10-31 Freescale Semiconductor, Inc. Reduced power magnetoresistive random access memory elements
US20130082232A1 (en) 2011-09-30 2013-04-04 Unity Semiconductor Corporation Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells
US7407885B2 (en) * 2005-05-11 2008-08-05 Micron Technology, Inc. Methods of forming electrically conductive plugs
KR100682950B1 (ko) * 2005-07-28 2007-02-15 삼성전자주식회사 강유전체 기록매체 및 그 제조 방법
US7738287B2 (en) * 2007-03-27 2010-06-15 Grandis, Inc. Method and system for providing field biased magnetic memory devices
JP2009283843A (ja) * 2008-05-26 2009-12-03 Renesas Technology Corp 半導体装置及びその製造方法
US7833806B2 (en) * 2009-01-30 2010-11-16 Everspin Technologies, Inc. Structure and method for fabricating cladded conductive lines in magnetic memories
KR101983137B1 (ko) * 2013-03-04 2019-05-28 삼성전기주식회사 파워 인덕터 및 그 제조방법
US10403424B2 (en) 2017-06-09 2019-09-03 Texas Instruments Incorporated Method to form magnetic core for integrated magnetic devices
CN112133820A (zh) * 2019-06-25 2020-12-25 中电海康集团有限公司 Mram底电极的制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09191084A (ja) * 1996-01-10 1997-07-22 Nec Corp 半導体装置及びその製造方法
JP2000090658A (ja) * 1998-09-09 2000-03-31 Sanyo Electric Co Ltd 磁気メモリ素子
WO2000072324A1 (en) * 1999-05-25 2000-11-30 Honeywell Inc. Local shielding for memory cells
JP2001230468A (ja) * 2000-02-17 2001-08-24 Sharp Corp 磁気トンネル接合素子及びそれを用いた磁気メモリ
WO2002041367A2 (en) * 2000-11-15 2002-05-23 Motorola, Inc., A Corporation Of The State Of Delaware Self-aligned magnetic clad write line and method thereof
WO2002084755A2 (en) * 2001-02-28 2002-10-24 Micron Technology, Inc. Keepers for mram electrodes

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2728025B2 (ja) 1995-04-13 1998-03-18 日本電気株式会社 半導体装置の製造方法
ATE223108T1 (de) * 1995-04-24 2002-09-15 Infineon Technologies Ag Halbleiter-speichervorrichtung unter verwendung eines ferroelektrischen dielektrikums und verfahren zur herstellung
US5732016A (en) * 1996-07-02 1998-03-24 Motorola Memory cell structure in a magnetic random access memory and a method for fabricating thereof
US6030877A (en) * 1997-10-06 2000-02-29 Industrial Technology Research Institute Electroless gold plating method for forming inductor structures
US5956267A (en) 1997-12-18 1999-09-21 Honeywell Inc Self-aligned wordline keeper and method of manufacture therefor
US6278165B1 (en) * 1998-06-29 2001-08-21 Kabushiki Kaisha Toshiba MIS transistor having a large driving current and method for producing the same
US5940319A (en) * 1998-08-31 1999-08-17 Motorola, Inc. Magnetic random access memory and fabricating method thereof
DE10106860A1 (de) * 2000-02-17 2001-08-30 Sharp Kk MTJ-Element und Magnetspeicher unter Verwendung eines solchen
US6211090B1 (en) * 2000-03-21 2001-04-03 Motorola, Inc. Method of fabricating flux concentrating layer for use with magnetoresistive random access memories
TW459374B (en) * 2000-08-30 2001-10-11 Mosel Vitelic Inc Method for forming magnetic layer of magnetic random access memory

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09191084A (ja) * 1996-01-10 1997-07-22 Nec Corp 半導体装置及びその製造方法
JP2000090658A (ja) * 1998-09-09 2000-03-31 Sanyo Electric Co Ltd 磁気メモリ素子
WO2000072324A1 (en) * 1999-05-25 2000-11-30 Honeywell Inc. Local shielding for memory cells
JP2001230468A (ja) * 2000-02-17 2001-08-24 Sharp Corp 磁気トンネル接合素子及びそれを用いた磁気メモリ
WO2002041367A2 (en) * 2000-11-15 2002-05-23 Motorola, Inc., A Corporation Of The State Of Delaware Self-aligned magnetic clad write line and method thereof
WO2002084755A2 (en) * 2001-02-28 2002-10-24 Micron Technology, Inc. Keepers for mram electrodes

Also Published As

Publication number Publication date
CN1374691A (zh) 2002-10-16
DE60201036D1 (de) 2004-09-30
HK1049067A1 (zh) 2003-04-25
KR20030009078A (ko) 2003-01-29
DE60201036T2 (de) 2005-08-11
EP1239489B1 (en) 2004-08-25
JP2002334973A (ja) 2002-11-22
US6475812B2 (en) 2002-11-05
EP1239489A1 (en) 2002-09-11
TW513803B (en) 2002-12-11
US20020127743A1 (en) 2002-09-12

Similar Documents

Publication Publication Date Title
KR100855573B1 (ko) 상부 컨덕터 클래딩 방법, 강자성 클래딩 제조 방법 및자기 메모리 장치
US6358757B2 (en) Method for forming magnetic memory with structures that prevent disruptions to magnetization in sense layers
USRE39799E1 (en) Memory cell array and method for manufacturing it
CN101288186B (zh) 磁阻隧道结磁性器件及其在磁性随机存取存储器中的应用
KR100948009B1 (ko) Ｍｔｊ ｍｒａｍ 셀, ｍｔｊ ｍｒａｍ 셀들의 어레이, 및 ｍｔｊ ｍｒａｍ 셀을 형성하는 방법
CN100447892C (zh) 具有软基准层的磁存储器件
US7936596B2 (en) Magnetic tunnel junction cell including multiple magnetic domains
US20080030906A1 (en) Magnetoresistive effect element and magnetic memory device
EP1420411A2 (en) Mram with asymmetric cladded conductor
JP5652472B2 (ja) 磁気メモリ素子、磁気メモリ、及びその製造方法
US6791872B2 (en) Method and article for concentrating fields at sense layers
US20030186552A1 (en) Method for producing magnetic memory device
KR20030009107A (ko) 반도체 기억 장치 및 그 제조 방법
WO2009020258A1 (en) Magnetic flux density driven magnetic domain wall moving memory device, operating method of the same, and forming method of the same
US7083990B1 (en) Method of fabricating MRAM cells
US6605837B2 (en) Memory cell configuration and production method
KR100887640B1 (ko) 요크 패턴을 갖는 자벽이동 메모리 장치 및 메모리 장치의형성 방법

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

N231 Notification of change of applicant
PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

FPAY Annual fee payment

Payment date: 20120802

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20130731

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20140731

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20160801

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

FPAY Annual fee payment

Payment date: 20180731

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

FPAY Annual fee payment

Payment date: 20190731

Year of fee payment: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20210827

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20210827