KR100797499B1 - 금속의 환원 방법, 다층 배선 및 그 제조 방법 또는 반도체장치 및 그 제조 방법 - Google Patents
금속의 환원 방법, 다층 배선 및 그 제조 방법 또는 반도체장치 및 그 제조 방법 Download PDFInfo
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22B—PRODUCTION AND REFINING OF METALS; PRETREATMENT OF RAW MATERIALS
- C22B5/00—General methods of reducing to metals
- C22B5/02—Dry methods smelting of sulfides or formation of mattes
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22B—PRODUCTION AND REFINING OF METALS; PRETREATMENT OF RAW MATERIALS
- C22B5/00—General methods of reducing to metals
- C22B5/02—Dry methods smelting of sulfides or formation of mattes
- C22B5/10—Dry methods smelting of sulfides or formation of mattes by solid carbonaceous reducing agents
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22B—PRODUCTION AND REFINING OF METALS; PRETREATMENT OF RAW MATERIALS
- C22B5/00—General methods of reducing to metals
- C22B5/02—Dry methods smelting of sulfides or formation of mattes
- C22B5/12—Dry methods smelting of sulfides or formation of mattes by gases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
Abstract
Description
Claims (10)
- 적어도 카르복실산 에스테르 화합물을 함유하는 증기를 수증기에 의해 가수 분해시켜 산화 금속을 환원하는 것을 특징으로 하는 금속의 환원 방법.
- 제1항에 있어서, 상기 카르복실산 에스테르 화합물은 하기 화학식 1 및 화학식 2 - 상기 화학식 1 및 화학식 2 중 R1 및 R2는 탄소수 1∼3의 탄화수소를 나타내고, n은 1∼3의 정수를 나타내고, m은 3∼7의 정수를 나타냄 - 중 어느 하나로 표시되는 화합물인 것인 금속의 환원 방법.[화학식 1]HCOOR1[화학식 2]CnHmCOOR2
- 제1항 또는 제2항에 있어서, 가열하에서 행해지고, 상기 가열온도가 50∼400℃인 금속의 환원 방법.
- 제1항 또는 제2항에 있어서, 진공하에서 행해지고, 상기 진공 압력이 50∼500 Pa인 금속의 환원 방법.
- 제1항 또는 제2항에 있어서, 가수 분해 온도가 50∼200℃인 금속의 환원 방법.
- 제1항 또는 제2항에 있어서, 적어도 카르복실산 에스테르 화합물을 함유하는 증기와 수증기의 유량비가 1 : 0.2∼1 : 2인 금속의 환원 방법.
- 피가공 표면에 피막을 형성하는 피막 형성 공정과,상기 피막을 마스크로 하여 에칭에 의해 상기 피가공 표면을 패터닝하는 패터닝 공정과,상기 패터닝된 피가공 표면에 배선을 형성하는 배선 형성 공정과,제1항 또는 제2항에 기재한 금속의 환원 방법에 의해, 상기 피가공 표면에 형성된 배선 표면의 환원 처리를 행하는 환원 공정을 포함하는 것을 특징으로 하는 다층 배선의 제조 방법.
- 다층 배선에 있어서,상기 다층 배선은 제7항에 기재한 다층 배선의 제조 방법에 의해 형성되는 것을 특징으로 하는 다층 배선.
- 반도체 장치에 있어서,제8항에 기재한 다층 배선을 적어도 포함하는 것을 특징으로 하는 반도체 장치.
- 반도체 장치의 제조 방법으로서,피가공면 상에 수지 피막을 형성하는 피막 형성 공정과,상기 피막을 마스크로 하여 에칭에 의해 상기 피가공면을 패터닝하는 패터닝 공정과,상기 패터닝이 된 피가공면에 배선을 형성하는 배선 형성 공정과,상기 피가공면에 형성된 배선 표면을 제1항 또는 제2항에 기재한 금속의 환원 방법에 의해 환원 처리하는 환원 공정을적어도 포함하는 것을 특징으로 하는 반도체 장치의 제조 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2006083864A JP4579181B2 (ja) | 2006-03-24 | 2006-03-24 | 多層配線における配線の還元方法、多層配線の製造方法、並びに、半導体装置の製造方法 |
JPJP-P-2006-00083864 | 2006-03-24 |
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KR20070096752A KR20070096752A (ko) | 2007-10-02 |
KR100797499B1 true KR100797499B1 (ko) | 2008-01-24 |
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KR1020060079823A KR100797499B1 (ko) | 2006-03-24 | 2006-08-23 | 금속의 환원 방법, 다층 배선 및 그 제조 방법 또는 반도체장치 및 그 제조 방법 |
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US (1) | US8440577B2 (ko) |
JP (1) | JP4579181B2 (ko) |
KR (1) | KR100797499B1 (ko) |
CN (1) | CN100501941C (ko) |
DE (1) | DE102006039001B4 (ko) |
TW (1) | TWI365230B (ko) |
Families Citing this family (3)
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JP4579181B2 (ja) * | 2006-03-24 | 2010-11-10 | 富士通セミコンダクター株式会社 | 多層配線における配線の還元方法、多層配線の製造方法、並びに、半導体装置の製造方法 |
JP2008034736A (ja) * | 2006-07-31 | 2008-02-14 | Tokyo Electron Ltd | 熱処理方法および熱処理装置 |
WO2011161797A1 (ja) * | 2010-06-24 | 2011-12-29 | 富士通株式会社 | 配線構造の形成方法、半導体装置の製造方法、基板処理装置 |
Citations (3)
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KR20030007612A (ko) * | 2000-05-15 | 2003-01-23 | 에이에스엠 마이크로케미스트리 오와이 | 집적회로의 생산 공정 |
KR20050106158A (ko) * | 2004-05-04 | 2005-11-09 | (주) 플라즈닉스 | 플라즈마를 이용한 활성탄의 표면 처리 방법 및 장치 |
KR20060074869A (ko) * | 2004-12-27 | 2006-07-03 | 미츠보시벨트 가부시기가이샤 | 폴리이미드 수지의 무기 박막 패턴 형성방법 |
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US2156217A (en) * | 1934-11-30 | 1939-04-25 | Rohm & Haas | Reduction with methanol |
US3647892A (en) | 1969-04-28 | 1972-03-07 | Halcon International Inc | Preparation of ethylene glycol |
JPS5331608A (en) * | 1976-09-02 | 1978-03-25 | Mitsubishi Chem Ind Ltd | Decomposition of methyl acetate |
JP2716737B2 (ja) * | 1988-07-25 | 1998-02-18 | 花王株式会社 | アルコールの製造法 |
US5939334A (en) * | 1997-05-22 | 1999-08-17 | Sharp Laboratories Of America, Inc. | System and method of selectively cleaning copper substrate surfaces, in-situ, to remove copper oxides |
JP4663059B2 (ja) | 2000-03-10 | 2011-03-30 | 東京エレクトロン株式会社 | 処理装置のクリーニング方法 |
JP2001271192A (ja) * | 2000-03-27 | 2001-10-02 | Jun Kikuchi | 表面処理方法 |
US6679951B2 (en) | 2000-05-15 | 2004-01-20 | Asm Intenational N.V. | Metal anneal with oxidation prevention |
US7494927B2 (en) | 2000-05-15 | 2009-02-24 | Asm International N.V. | Method of growing electrical conductors |
US6878628B2 (en) * | 2000-05-15 | 2005-04-12 | Asm International Nv | In situ reduction of copper oxide prior to silicon carbide deposition |
US7491634B2 (en) * | 2006-04-28 | 2009-02-17 | Asm International N.V. | Methods for forming roughened surfaces and applications thereof |
JP3734447B2 (ja) | 2002-01-18 | 2006-01-11 | 富士通株式会社 | 半導体装置の製造方法および半導体装置の製造装置 |
JP2004071705A (ja) | 2002-08-02 | 2004-03-04 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP4225765B2 (ja) | 2002-10-31 | 2009-02-18 | 日揮触媒化成株式会社 | 低誘電率非晶質シリカ系被膜の形成方法および該方法より得られる低誘電率非晶質シリカ系被膜 |
JP2004241641A (ja) * | 2003-02-06 | 2004-08-26 | Fujitsu Ltd | 半導体装置の製造方法 |
US7405143B2 (en) * | 2004-03-25 | 2008-07-29 | Asm International N.V. | Method for fabricating a seed layer |
JP4579181B2 (ja) * | 2006-03-24 | 2010-11-10 | 富士通セミコンダクター株式会社 | 多層配線における配線の還元方法、多層配線の製造方法、並びに、半導体装置の製造方法 |
EP2159270A1 (de) * | 2008-08-28 | 2010-03-03 | Bayer MaterialScience AG | Verfahren zur Herstellung von elektrisch leitfähigen Strukturen |
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- 2006-03-24 JP JP2006083864A patent/JP4579181B2/ja not_active Expired - Fee Related
- 2006-08-21 DE DE102006039001A patent/DE102006039001B4/de not_active Expired - Fee Related
- 2006-08-22 TW TW095130803A patent/TWI365230B/zh not_active IP Right Cessation
- 2006-08-23 KR KR1020060079823A patent/KR100797499B1/ko not_active IP Right Cessation
- 2006-09-11 US US11/518,237 patent/US8440577B2/en not_active Expired - Fee Related
- 2006-09-15 CN CNB2006101274752A patent/CN100501941C/zh not_active Expired - Fee Related
Patent Citations (3)
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KR20030007612A (ko) * | 2000-05-15 | 2003-01-23 | 에이에스엠 마이크로케미스트리 오와이 | 집적회로의 생산 공정 |
KR20050106158A (ko) * | 2004-05-04 | 2005-11-09 | (주) 플라즈닉스 | 플라즈마를 이용한 활성탄의 표면 처리 방법 및 장치 |
KR20060074869A (ko) * | 2004-12-27 | 2006-07-03 | 미츠보시벨트 가부시기가이샤 | 폴리이미드 수지의 무기 박막 패턴 형성방법 |
Also Published As
Publication number | Publication date |
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US8440577B2 (en) | 2013-05-14 |
DE102006039001B4 (de) | 2009-05-20 |
TW200736409A (en) | 2007-10-01 |
CN100501941C (zh) | 2009-06-17 |
DE102006039001A1 (de) | 2007-09-27 |
US20070221509A1 (en) | 2007-09-27 |
KR20070096752A (ko) | 2007-10-02 |
CN101043005A (zh) | 2007-09-26 |
TWI365230B (en) | 2012-06-01 |
JP4579181B2 (ja) | 2010-11-10 |
JP2007258594A (ja) | 2007-10-04 |
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