KR100763897B1 - 나노도트를 가지는 메모리 제조방법 - Google Patents

나노도트를 가지는 메모리 제조방법 Download PDF

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KR100763897B1
KR100763897B1 KR20020082387A KR20020082387A KR100763897B1 KR 100763897 B1 KR100763897 B1 KR 100763897B1 KR 20020082387 A KR20020082387 A KR 20020082387A KR 20020082387 A KR20020082387 A KR 20020082387A KR 100763897 B1 KR100763897 B1 KR 100763897B1
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South Korea
Prior art keywords
layer
charge storage
nano
memory
sacrificial layer
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KR20020082387A
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English (en)
Korean (ko)
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KR20040056409A (ko
Inventor
김인숙
서순애
유인경
정수환
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삼성전자주식회사
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Priority to KR20020082387A priority Critical patent/KR100763897B1/ko
Priority to CNB2003101164388A priority patent/CN100336201C/zh
Priority to DE60333819T priority patent/DE60333819D1/de
Priority to EP03257431A priority patent/EP1437775B1/fr
Priority to JP2003425346A priority patent/JP4434721B2/ja
Priority to US10/743,377 priority patent/US6913984B2/en
Publication of KR20040056409A publication Critical patent/KR20040056409A/ko
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Publication of KR100763897B1 publication Critical patent/KR100763897B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H01L29/42332—Gate electrodes for transistors with a floating gate with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/701—Integrated with dissimilar structures on a common substrate
    • Y10S977/723—On an electrically insulating substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/70—Nanostructure
    • Y10S977/773—Nanoparticle, i.e. structure having three dimensions of 100 nm or less
    • Y10S977/774—Exhibiting three-dimensional carrier confinement, e.g. quantum dots

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR20020082387A 2002-12-23 2002-12-23 나노도트를 가지는 메모리 제조방법 KR100763897B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR20020082387A KR100763897B1 (ko) 2002-12-23 2002-12-23 나노도트를 가지는 메모리 제조방법
CNB2003101164388A CN100336201C (zh) 2002-12-23 2003-11-21 制造带有纳米点的存储器的方法
DE60333819T DE60333819D1 (de) 2002-12-23 2003-11-25 Herstellungsverfahren eines Halbleiterspeichers mit Nanodots
EP03257431A EP1437775B1 (fr) 2002-12-23 2003-11-25 Procédé de fabrication d'un dispositif de mémoire à semi-conducteur avec des nanopoints
JP2003425346A JP4434721B2 (ja) 2002-12-23 2003-12-22 ナノドットを有するメモリ製造方法
US10/743,377 US6913984B2 (en) 2002-12-23 2003-12-23 Method of manufacturing memory with nano dots

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR20020082387A KR100763897B1 (ko) 2002-12-23 2002-12-23 나노도트를 가지는 메모리 제조방법

Publications (2)

Publication Number Publication Date
KR20040056409A KR20040056409A (ko) 2004-07-01
KR100763897B1 true KR100763897B1 (ko) 2007-10-05

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Country Link
US (1) US6913984B2 (fr)
EP (1) EP1437775B1 (fr)
JP (1) JP4434721B2 (fr)
KR (1) KR100763897B1 (fr)
CN (1) CN100336201C (fr)
DE (1) DE60333819D1 (fr)

Cited By (1)

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WO2009088587A2 (fr) * 2007-12-31 2009-07-16 Intel Corporation Procédés de formation de nanopoints à l'aide de techniques de formation de motifs d'espaceur, et structures ainsi formées

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KR100585462B1 (ko) * 2003-12-26 2006-06-07 한국전자통신연구원 정보 저장 및 독출 장치
KR100601943B1 (ko) * 2004-03-04 2006-07-14 삼성전자주식회사 고르게 분포된 실리콘 나노 도트가 포함된 게이트를구비하는 메모리 소자의 제조 방법
US7208793B2 (en) * 2004-11-23 2007-04-24 Micron Technology, Inc. Scalable integrated logic and non-volatile memory
US7170128B2 (en) * 2004-12-02 2007-01-30 Atmel Corporation Multi-bit nanocrystal memory
JP4442454B2 (ja) * 2005-02-16 2010-03-31 株式会社日立製作所 不揮発性半導体メモリの製造方法
CN100483613C (zh) * 2005-02-24 2009-04-29 鸿富锦精密工业（深圳）有限公司 量子点制作方法
US7612403B2 (en) * 2005-05-17 2009-11-03 Micron Technology, Inc. Low power non-volatile memory and gate stack
JPWO2006129367A1 (ja) * 2005-06-02 2008-12-25 有限会社 みすゞＲ＆Ｄ 不揮発性メモリ
US7173304B2 (en) * 2005-06-06 2007-02-06 Micron Technology, Inc. Method of manufacturing devices comprising conductive nano-dots, and devices comprising same
CN100356607C (zh) * 2005-10-19 2007-12-19 中国科学院上海微系统与信息技术研究所 一种纳米硫系化合物相变存储器的制备方法
KR100690925B1 (ko) * 2005-12-01 2007-03-09 삼성전자주식회사 나노 크리스탈 비휘발성 반도체 집적 회로 장치 및 그 제조방법
KR100718142B1 (ko) * 2005-12-02 2007-05-14 삼성전자주식회사 금속층-절연층-금속층 구조의 스토리지 노드를 구비하는불휘발성 메모리 소자 및 그 동작 방법
US20070212832A1 (en) * 2006-03-08 2007-09-13 Freescale Semiconductor Inc. Method for making a multibit transistor
KR100740613B1 (ko) * 2006-07-03 2007-07-18 삼성전자주식회사 비휘발성 기억 소자의 형성 방법
US7955935B2 (en) 2006-08-03 2011-06-07 Micron Technology, Inc. Non-volatile memory cell devices and methods
US7560769B2 (en) 2006-08-03 2009-07-14 Micron Technology, Inc. Non-volatile memory cell device and methods
KR100933831B1 (ko) * 2006-09-06 2009-12-24 주식회사 하이닉스반도체 플래시 메모리 소자의 플로팅 게이트 형성 방법
US20080093744A1 (en) * 2006-10-23 2008-04-24 Wang Lorraine C Anodization
KR100858085B1 (ko) * 2006-12-18 2008-09-10 삼성전자주식회사 나노닷을 전하 트랩 사이트로 이용하는 전하 트랩형 메모리소자
US7790560B2 (en) * 2007-03-12 2010-09-07 Board Of Regents Of The Nevada System Of Higher Education Construction of flash memory chips and circuits from ordered nanoparticles
WO2009029302A2 (fr) * 2007-05-08 2009-03-05 University Of Washington Lithographie à bordure d'ombre pour formation de motif à l'échelle nanométrique et fabrication
US7723186B2 (en) * 2007-12-18 2010-05-25 Sandisk Corporation Method of forming memory with floating gates including self-aligned metal nanodots using a coupling layer
US8193055B1 (en) 2007-12-18 2012-06-05 Sandisk Technologies Inc. Method of forming memory with floating gates including self-aligned metal nanodots using a polymer solution
US8383479B2 (en) * 2009-07-21 2013-02-26 Sandisk Technologies Inc. Integrated nanostructure-based non-volatile memory fabrication
US20130294180A1 (en) 2011-01-13 2013-11-07 Ramot at Tel-Avlv University Ltd. Charge storage organic memory system
KR20130070923A (ko) * 2011-12-20 2013-06-28 에스케이하이닉스 주식회사 반도체 장치 제조 방법
US8822288B2 (en) 2012-07-02 2014-09-02 Sandisk Technologies Inc. NAND memory device containing nanodots and method of making thereof
US8823075B2 (en) 2012-11-30 2014-09-02 Sandisk Technologies Inc. Select gate formation for nanodot flat cell
US8987802B2 (en) 2013-02-28 2015-03-24 Sandisk Technologies Inc. Method for using nanoparticles to make uniform discrete floating gate layer
US9331181B2 (en) 2013-03-11 2016-05-03 Sandisk Technologies Inc. Nanodot enhanced hybrid floating gate for non-volatile memory devices
US9177808B2 (en) 2013-05-21 2015-11-03 Sandisk Technologies Inc. Memory device with control gate oxygen diffusion control and method of making thereof
US8969153B2 (en) 2013-07-01 2015-03-03 Sandisk Technologies Inc. NAND string containing self-aligned control gate sidewall cladding

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009088587A2 (fr) * 2007-12-31 2009-07-16 Intel Corporation Procédés de formation de nanopoints à l'aide de techniques de formation de motifs d'espaceur, et structures ainsi formées
WO2009088587A3 (fr) * 2007-12-31 2009-09-11 Intel Corporation Procédés de formation de nanopoints à l'aide de techniques de formation de motifs d'espaceur, et structures ainsi formées
US8388854B2 (en) 2007-12-31 2013-03-05 Intel Corporation Methods of forming nanodots using spacer patterning techniques and structures formed thereby

Also Published As

Publication number Publication date
DE60333819D1 (de) 2010-09-30
JP2004207739A (ja) 2004-07-22
CN1510740A (zh) 2004-07-07
EP1437775A2 (fr) 2004-07-14
JP4434721B2 (ja) 2010-03-17
US6913984B2 (en) 2005-07-05
CN100336201C (zh) 2007-09-05
EP1437775B1 (fr) 2010-08-18
EP1437775A3 (fr) 2006-08-30
KR20040056409A (ko) 2004-07-01
US20040137704A1 (en) 2004-07-15

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