KR100758885B1 - 플래시 메모리용 고속 디코더 - Google Patents

플래시 메모리용 고속 디코더 Download PDF

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Publication number
KR100758885B1
KR100758885B1 KR1020020019157A KR20020019157A KR100758885B1 KR 100758885 B1 KR100758885 B1 KR 100758885B1 KR 1020020019157 A KR1020020019157 A KR 1020020019157A KR 20020019157 A KR20020019157 A KR 20020019157A KR 100758885 B1 KR100758885 B1 KR 100758885B1
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KR
South Korea
Prior art keywords
gate
word line
coupled
transistor
channel transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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KR1020020019157A
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English (en)
Korean (ko)
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KR20030009101A (ko
Inventor
아카오기다카오
Original Assignee
후지쯔 가부시끼가이샤
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Publication of KR20030009101A publication Critical patent/KR20030009101A/ko
Application granted granted Critical
Publication of KR100758885B1 publication Critical patent/KR100758885B1/ko
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits

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  • Read Only Memory (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
KR1020020019157A 2001-04-30 2002-04-09 플래시 메모리용 고속 디코더 Expired - Fee Related KR100758885B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/846,099 2001-04-30
US09/846,099 US6646950B2 (en) 2001-04-30 2001-04-30 High speed decoder for flash memory

Publications (2)

Publication Number Publication Date
KR20030009101A KR20030009101A (ko) 2003-01-29
KR100758885B1 true KR100758885B1 (ko) 2007-09-19

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Family Applications (1)

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KR1020020019157A Expired - Fee Related KR100758885B1 (ko) 2001-04-30 2002-04-09 플래시 메모리용 고속 디코더

Country Status (6)

Country Link
US (1) US6646950B2 (enExample)
EP (1) EP1255255B1 (enExample)
JP (2) JP2003016793A (enExample)
KR (1) KR100758885B1 (enExample)
DE (1) DE60227597D1 (enExample)
TW (1) TW550577B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1351397A3 (en) 2001-11-27 2005-03-02 Texas Instruments Incorporated All-digital frequency synthesis with capacitive re-introduction of dithered tuning information
US6809960B2 (en) * 2002-08-26 2004-10-26 Micron Technology, Inc. High speed low voltage driver
US6888754B2 (en) * 2003-01-31 2005-05-03 Taiwan Semiconductor Manufacturing Company Nonvolatile semiconductor memory array with byte-program, byte-erase, and byte-read capabilities
US6778437B1 (en) * 2003-08-07 2004-08-17 Advanced Micro Devices, Inc. Memory circuit for providing word line redundancy in a memory sector
JP2005302139A (ja) * 2004-04-09 2005-10-27 Nec Electronics Corp 半導体記憶装置
US7002492B2 (en) * 2004-07-07 2006-02-21 Seagate Technology Llc High rate running digital sum-restricted code
WO2006090442A1 (ja) * 2005-02-23 2006-08-31 Spansion Llc 半導体装置およびその制御方法
US7126862B2 (en) * 2005-03-08 2006-10-24 Spansion Llc Decoder for memory device
US7428172B2 (en) * 2006-07-17 2008-09-23 Freescale Semiconductor, Inc. Concurrent programming and program verification of floating gate transistor
US7583554B2 (en) * 2007-03-02 2009-09-01 Freescale Semiconductor, Inc. Integrated circuit fuse array
US7787323B2 (en) * 2007-04-27 2010-08-31 Freescale Semiconductor, Inc. Level detect circuit
KR101309113B1 (ko) 2007-08-23 2013-09-16 삼성전자주식회사 리드 와일 라이트 동작 시 발생하는 리드 전압의 변동을최소화할 수 있는 노아 플래시 메모리 장치 및 방법
US7672163B2 (en) * 2007-09-14 2010-03-02 Sandisk Corporation Control gate line architecture
JP5398520B2 (ja) * 2009-12-25 2014-01-29 株式会社東芝 ワード線駆動回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6026047A (en) * 1998-11-03 2000-02-15 Samsung Electronics Co., Ltd. Integrated circuit memory device with hierarchical work line structure

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6129488A (ja) * 1984-07-20 1986-02-10 Hitachi Micro Comput Eng Ltd ダイナミツク型ｒａｍ
JPH0194591A (ja) * 1987-10-06 1989-04-13 Fujitsu Ltd 半導体メモリ
JPH05120881A (ja) 1991-10-24 1993-05-18 Mitsubishi Electric Corp 半導体記憶装置
JPH0745074A (ja) 1993-07-29 1995-02-14 Mitsubishi Electric Corp 半導体記憶装置
KR960011206B1 (ko) 1993-11-09 1996-08-21 삼성전자 주식회사 반도체메모리장치의 워드라인구동회로
JP3478953B2 (ja) * 1997-09-03 2003-12-15 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置
JPH11317074A (ja) * 1998-04-30 1999-11-16 Nec Corp ワード線制御回路
DE19841445C2 (de) * 1998-09-10 2002-04-25 Infineon Technologies Ag Halbleiter-Schaltungsanordnung
US6255900B1 (en) * 1998-11-18 2001-07-03 Macronix International Co., Ltd. Rapid on chip voltage generation for low power integrated circuits
EP1151365B1 (en) * 1998-11-18 2004-05-12 Macronix International Co., Ltd. Rapid on chip voltage generation for low power integrated circuits
KR20000045361A (ko) * 1998-12-30 2000-07-15 김영환 워드라인 구동장치
JP3940513B2 (ja) * 1999-01-11 2007-07-04 株式会社東芝 半導体記憶装置
JP3296319B2 (ja) * 1999-03-02 2002-06-24 日本電気株式会社 ワード線駆動回路及び半導体記憶装置
KR100381962B1 (ko) * 2000-08-07 2003-05-01 삼성전자주식회사 비휘발성 메모리 장치의 로우 디코더
US6347052B1 (en) * 2000-08-31 2002-02-12 Advanced Micro Devices Inc. Word line decoding architecture in a flash memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6026047A (en) * 1998-11-03 2000-02-15 Samsung Electronics Co., Ltd. Integrated circuit memory device with hierarchical work line structure

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
US06026047, US06347052, US0625900

Also Published As

Publication number Publication date
US20020159296A1 (en) 2002-10-31
EP1255255B1 (en) 2008-07-16
TW550577B (en) 2003-09-01
JP2003016793A (ja) 2003-01-17
JP2007323808A (ja) 2007-12-13
KR20030009101A (ko) 2003-01-29
EP1255255A2 (en) 2002-11-06
EP1255255A3 (en) 2004-06-02
DE60227597D1 (enExample) 2008-08-28
US6646950B2 (en) 2003-11-11

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