KR100723894B1 - 데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 - Google Patents
데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 Download PDFInfo
- Publication number
- KR100723894B1 KR100723894B1 KR1020010019484A KR20010019484A KR100723894B1 KR 100723894 B1 KR100723894 B1 KR 100723894B1 KR 1020010019484 A KR1020010019484 A KR 1020010019484A KR 20010019484 A KR20010019484 A KR 20010019484A KR 100723894 B1 KR100723894 B1 KR 100723894B1
- Authority
- KR
- South Korea
- Prior art keywords
- potential
- bit line
- charge
- data
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000-333160 | 2000-10-31 | ||
| JP2000333160A JP4031904B2 (ja) | 2000-10-31 | 2000-10-31 | データ読み出し回路とデータ読み出し方法及びデータ記憶装置 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020070041025A Division KR100903045B1 (ko) | 2000-10-31 | 2007-04-26 | 데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020034835A KR20020034835A (ko) | 2002-05-09 |
| KR100723894B1 true KR100723894B1 (ko) | 2007-06-04 |
Family
ID=18809278
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020010019484A Expired - Fee Related KR100723894B1 (ko) | 2000-10-31 | 2001-04-12 | 데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 |
| KR1020070041025A Expired - Fee Related KR100903045B1 (ko) | 2000-10-31 | 2007-04-26 | 데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020070041025A Expired - Fee Related KR100903045B1 (ko) | 2000-10-31 | 2007-04-26 | 데이터 판독 회로, 데이터 판독 방법 및 데이터 기억 장치 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US6487103B2 (enExample) |
| JP (1) | JP4031904B2 (enExample) |
| KR (2) | KR100723894B1 (enExample) |
Families Citing this family (46)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3794326B2 (ja) | 2002-01-10 | 2006-07-05 | 富士通株式会社 | 負電圧生成回路及びこれを備えた強誘電体メモリ回路並びに集積回路装置 |
| AU2003281556A1 (en) * | 2002-07-23 | 2004-02-09 | Matsushita Electric Industrial Co., Ltd. | Ferroelectric gate device |
| CN100446118C (zh) * | 2003-03-19 | 2008-12-24 | 富士通微电子株式会社 | 半导体存储装置 |
| JP4185969B2 (ja) * | 2003-04-10 | 2008-11-26 | 富士通マイクロエレクトロニクス株式会社 | 強誘電体メモリおよびそのデータ読み出し方法 |
| US7193880B2 (en) * | 2004-06-14 | 2007-03-20 | Texas Instruments Incorporated | Plateline voltage pulsing to reduce storage node disturbance in ferroelectric memory |
| JP2005129151A (ja) | 2003-10-23 | 2005-05-19 | Fujitsu Ltd | 半導体記憶装置 |
| US7009864B2 (en) * | 2003-12-29 | 2006-03-07 | Texas Instruments Incorporated | Zero cancellation scheme to reduce plateline voltage in ferroelectric memory |
| JP4336212B2 (ja) | 2004-01-26 | 2009-09-30 | 富士通マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
| US7227769B2 (en) | 2004-03-08 | 2007-06-05 | Fujitsu Limited | Semiconductor memory |
| JP4157528B2 (ja) | 2004-03-08 | 2008-10-01 | 富士通株式会社 | 半導体メモリ |
| US7133304B2 (en) * | 2004-03-22 | 2006-11-07 | Texas Instruments Incorporated | Method and apparatus to reduce storage node disturbance in ferroelectric memory |
| US6970371B1 (en) * | 2004-05-17 | 2005-11-29 | Texas Instruments Incorporated | Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages |
| JP4064951B2 (ja) | 2004-07-28 | 2008-03-19 | 株式会社東芝 | 強誘電体半導体記憶装置 |
| JP2006179048A (ja) * | 2004-12-21 | 2006-07-06 | Sanyo Electric Co Ltd | 半導体装置 |
| JP4647313B2 (ja) * | 2005-01-06 | 2011-03-09 | 富士通セミコンダクター株式会社 | 半導体メモリ |
| JP4452631B2 (ja) | 2005-01-21 | 2010-04-21 | パトレネラ キャピタル リミテッド, エルエルシー | メモリ |
| JP2006260742A (ja) | 2005-02-15 | 2006-09-28 | Sanyo Electric Co Ltd | メモリ |
| JP4186119B2 (ja) | 2005-07-27 | 2008-11-26 | セイコーエプソン株式会社 | 強誘電体メモリ装置 |
| US20070103961A1 (en) * | 2005-11-07 | 2007-05-10 | Honeywell International Inc. | RAM cell with soft error protection using ferroelectric material |
| JP4305960B2 (ja) * | 2005-12-28 | 2009-07-29 | セイコーエプソン株式会社 | 強誘電体メモリ装置 |
| JP4983062B2 (ja) * | 2006-03-20 | 2012-07-25 | 富士通セミコンダクター株式会社 | メモリ装置 |
| JP4996177B2 (ja) * | 2006-08-30 | 2012-08-08 | 富士通セミコンダクター株式会社 | 半導体記憶装置、およびデータ読み出し方法 |
| JP4186169B2 (ja) | 2006-09-01 | 2008-11-26 | セイコーエプソン株式会社 | 強誘電体記憶装置および電子機器 |
| JP4807192B2 (ja) * | 2006-09-01 | 2011-11-02 | セイコーエプソン株式会社 | 正電位変換回路、強誘電体記憶装置および電子機器 |
| JP4807191B2 (ja) * | 2006-09-01 | 2011-11-02 | セイコーエプソン株式会社 | 強誘電体記憶装置および電子機器 |
| JP4207077B2 (ja) | 2006-10-02 | 2009-01-14 | セイコーエプソン株式会社 | 強誘電体メモリ装置及びその駆動方法並びに電子機器 |
| KR20080051076A (ko) | 2006-12-04 | 2008-06-10 | 세이코 엡슨 가부시키가이샤 | 강유전체 기억 장치 및 전자 기기 |
| US7561458B2 (en) * | 2006-12-26 | 2009-07-14 | Texas Instruments Incorporated | Ferroelectric memory array for implementing a zero cancellation scheme to reduce plateline voltage in ferroelectric memory |
| US7916556B2 (en) | 2007-01-09 | 2011-03-29 | Sony Corporation | Semiconductor memory device, sense amplifier circuit and memory cell reading method using a threshold correction circuitry |
| JP5024374B2 (ja) | 2007-05-18 | 2012-09-12 | 富士通セミコンダクター株式会社 | 半導体メモリ |
| JP2008305469A (ja) | 2007-06-06 | 2008-12-18 | Toshiba Corp | 半導体記憶装置 |
| KR101139163B1 (ko) | 2007-09-14 | 2012-04-26 | 후지쯔 세미컨덕터 가부시키가이샤 | 반도체 메모리 |
| US7920404B2 (en) * | 2007-12-31 | 2011-04-05 | Texas Instruments Incorporated | Ferroelectric memory devices with partitioned platelines |
| JP2009301658A (ja) | 2008-06-13 | 2009-12-24 | Seiko Epson Corp | 強誘電体記憶装置、強誘電体記憶装置の駆動方法および電子機器 |
| TWI480526B (zh) * | 2009-12-24 | 2015-04-11 | Seiko Epson Corp | 紅外線檢測電路、感測器裝置及電子機器 |
| JP5500051B2 (ja) | 2010-11-22 | 2014-05-21 | 富士通セミコンダクター株式会社 | 強誘電体メモリ |
| JP6145972B2 (ja) * | 2012-03-05 | 2017-06-14 | 富士通セミコンダクター株式会社 | 不揮発性ラッチ回路及びメモリ装置 |
| JP6370649B2 (ja) * | 2014-09-09 | 2018-08-08 | エイブリック株式会社 | データ読出し回路 |
| US9638672B2 (en) * | 2015-03-06 | 2017-05-02 | Bongiovi Acoustics Llc | System and method for acquiring acoustic information from a resonating body |
| US9552864B1 (en) * | 2016-03-11 | 2017-01-24 | Micron Technology, Inc. | Offset compensation for ferroelectric memory cell sensing |
| US10192606B2 (en) * | 2016-04-05 | 2019-01-29 | Micron Technology, Inc. | Charge extraction from ferroelectric memory cell using sense capacitors |
| US9858979B1 (en) * | 2016-10-05 | 2018-01-02 | Micron Technology, Inc. | Reprogrammable non-volatile ferroelectric latch for use with a memory controller |
| US10388353B1 (en) * | 2018-03-16 | 2019-08-20 | Micron Technology, Inc. | Canceling memory cell variations by isolating digit lines |
| US10803910B2 (en) | 2018-07-25 | 2020-10-13 | Fujitsu Semiconductor Limited | Semiconductor storage device and read method thereof |
| US11043252B2 (en) | 2018-07-25 | 2021-06-22 | Fujitsu Semiconductor Memory Solution Limited | Semiconductor storage device, read method thereof, and test method thereof |
| US10692557B1 (en) | 2019-04-11 | 2020-06-23 | Micron Technology, Inc. | Reference voltage management |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09185890A (ja) * | 1996-01-08 | 1997-07-15 | Hitachi Ltd | 強誘電体記憶装置 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3319637B2 (ja) * | 1993-11-10 | 2002-09-03 | 松下電器産業株式会社 | 半導体記憶装置及びその制御方法 |
| DE69736080T2 (de) * | 1996-03-25 | 2006-10-19 | Matsushita Electric Industrial Co., Ltd., Kadoma | Ferroelekrische Speicheranordnung |
| JP3897388B2 (ja) * | 1996-12-27 | 2007-03-22 | シャープ株式会社 | シリアルアクセス方式の半導体記憶装置 |
| KR100256226B1 (ko) * | 1997-06-26 | 2000-05-15 | 김영환 | 레퍼런스 전압 발생 장치 |
| KR100275107B1 (ko) * | 1997-12-30 | 2000-12-15 | 김영환 | 강유전체메모리장치및그구동방법 |
-
2000
- 2000-10-31 JP JP2000333160A patent/JP4031904B2/ja not_active Expired - Fee Related
-
2001
- 2001-03-21 US US09/812,699 patent/US6487103B2/en not_active Expired - Lifetime
- 2001-04-12 KR KR1020010019484A patent/KR100723894B1/ko not_active Expired - Fee Related
-
2002
- 2002-10-18 US US10/272,997 patent/US6661697B2/en not_active Expired - Lifetime
-
2007
- 2007-04-26 KR KR1020070041025A patent/KR100903045B1/ko not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09185890A (ja) * | 1996-01-08 | 1997-07-15 | Hitachi Ltd | 強誘電体記憶装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2002133857A (ja) | 2002-05-10 |
| US6661697B2 (en) | 2003-12-09 |
| US20020051376A1 (en) | 2002-05-02 |
| US20030031042A1 (en) | 2003-02-13 |
| KR20020034835A (ko) | 2002-05-09 |
| US6487103B2 (en) | 2002-11-26 |
| KR100903045B1 (ko) | 2009-06-18 |
| KR20070056015A (ko) | 2007-05-31 |
| JP4031904B2 (ja) | 2008-01-09 |
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