KR100689917B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR100689917B1
KR100689917B1 KR1020010002929A KR20010002929A KR100689917B1 KR 100689917 B1 KR100689917 B1 KR 100689917B1 KR 1020010002929 A KR1020010002929 A KR 1020010002929A KR 20010002929 A KR20010002929 A KR 20010002929A KR 100689917 B1 KR100689917 B1 KR 100689917B1
Authority
KR
South Korea
Prior art keywords
film
insulating film
atoms
forming
less
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020010002929A
Other languages
English (en)
Korean (ko)
Other versions
KR20010076349A (ko
Inventor
후루사와다께시
류자끼다이스께
사꾸마노리유끼
마찌다순따로
히노데겐지
요네야마료우
Original Assignee
가부시키가이샤 히타치세이사쿠쇼
가부시기가이샤 히다치초엘에스아이시스템즈
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 히타치세이사쿠쇼, 가부시기가이샤 히다치초엘에스아이시스템즈 filed Critical 가부시키가이샤 히타치세이사쿠쇼
Publication of KR20010076349A publication Critical patent/KR20010076349A/ko
Application granted granted Critical
Publication of KR100689917B1 publication Critical patent/KR100689917B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
KR1020010002929A 2000-01-18 2001-01-18 반도체 장치 및 그 제조 방법 Expired - Fee Related KR100689917B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-013895 2000-01-18
JP2000013895A JP3615979B2 (ja) 2000-01-18 2000-01-18 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
KR20010076349A KR20010076349A (ko) 2001-08-11
KR100689917B1 true KR100689917B1 (ko) 2007-03-09

Family

ID=18541427

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020010002929A Expired - Fee Related KR100689917B1 (ko) 2000-01-18 2001-01-18 반도체 장치 및 그 제조 방법

Country Status (4)

Country Link
US (2) US6358838B2 (enExample)
JP (1) JP3615979B2 (enExample)
KR (1) KR100689917B1 (enExample)
TW (1) TW513763B (enExample)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000174123A (ja) * 1998-12-09 2000-06-23 Nec Corp 半導体装置及びその製造方法
US6500752B2 (en) * 2000-07-21 2002-12-31 Canon Sales Co., Inc. Semiconductor device and semiconductor device manufacturing method
JP4270865B2 (ja) * 2000-08-18 2009-06-03 三菱電機株式会社 実装基板及び実装基板を用いたバルブソケット
JP2002329722A (ja) * 2001-04-27 2002-11-15 Nec Corp 半導体装置及びその製造方法
US6699792B1 (en) * 2001-07-17 2004-03-02 Advanced Micro Devices, Inc. Polymer spacers for creating small geometry space and method of manufacture thereof
US6887780B2 (en) * 2001-08-31 2005-05-03 Intel Corporation Concentration graded carbon doped oxide
JP3913638B2 (ja) * 2001-09-03 2007-05-09 東京エレクトロン株式会社 熱処理方法及び熱処理装置
JP2003092349A (ja) * 2001-09-18 2003-03-28 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4063619B2 (ja) * 2002-03-13 2008-03-19 Necエレクトロニクス株式会社 半導体装置の製造方法
JP3516446B2 (ja) 2002-04-26 2004-04-05 東京応化工業株式会社 ホトレジスト剥離方法
US7071112B2 (en) * 2002-10-21 2006-07-04 Applied Materials, Inc. BARC shaping for improved fabrication of dual damascene integrated circuit features
US6867126B1 (en) * 2002-11-07 2005-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method to increase cracking threshold for low-k materials
US20040152295A1 (en) * 2003-02-03 2004-08-05 International Business Machines Corporation Sacrificial metal liner for copper
US7279410B1 (en) 2003-03-05 2007-10-09 Advanced Micro Devices, Inc. Method for forming inlaid structures for IC interconnections
US8137764B2 (en) * 2003-05-29 2012-03-20 Air Products And Chemicals, Inc. Mechanical enhancer additives for low dielectric films
US6767827B1 (en) 2003-06-11 2004-07-27 Advanced Micro Devices, Inc. Method for forming dual inlaid structures for IC interconnections
US6919636B1 (en) 2003-07-31 2005-07-19 Advanced Micro Devices, Inc. Interconnects with a dielectric sealant layer
TWI285938B (en) * 2003-08-28 2007-08-21 Fujitsu Ltd Semiconductor device
JP4282493B2 (ja) * 2004-01-15 2009-06-24 株式会社東芝 膜形成方法及び基板処理装置
TW200605220A (en) * 2004-06-21 2006-02-01 Hitachi Chemical Co Ltd Organic siloxane film, semiconductor device using same, flat panel display and raw material liquid
JP4854938B2 (ja) 2004-07-06 2012-01-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7202564B2 (en) * 2005-02-16 2007-04-10 International Business Machines Corporation Advanced low dielectric constant organosilicon plasma chemical vapor deposition films
US7332428B2 (en) * 2005-02-28 2008-02-19 Infineon Technologies Ag Metal interconnect structure and method
US7214612B2 (en) * 2005-08-31 2007-05-08 United Microelectronics Corp. Dual damascene structure and fabrication thereof
US7410899B2 (en) * 2005-09-20 2008-08-12 Enthone, Inc. Defectivity and process control of electroless deposition in microelectronics applications
JP5154009B2 (ja) * 2005-10-21 2013-02-27 株式会社ジャパンディスプレイイースト 有機シロキサン系絶縁膜の製造方法、及び、この製造方法で製造した有機シロキサン系絶縁膜を層間絶縁として用いた液晶表示装置の製造方法
JP5168142B2 (ja) * 2006-05-17 2013-03-21 日本電気株式会社 半導体装置
US8637396B2 (en) * 2008-12-01 2014-01-28 Air Products And Chemicals, Inc. Dielectric barrier deposition using oxygen containing precursor
EP2306506B1 (en) * 2009-10-01 2013-07-31 ams AG Method of producing a semiconductor device having a through-wafer interconnect
JP2013020530A (ja) * 2011-07-13 2013-01-31 Dainippon Printing Co Ltd タッチセンサパネル部材、タッチセンサパネル部材を備えた表示装置、及びタッチセンサパネル部材の製造方法
US10319630B2 (en) * 2012-09-27 2019-06-11 Stmicroelectronics, Inc. Encapsulated damascene interconnect structure for integrated circuits
US8980740B2 (en) 2013-03-06 2015-03-17 Globalfoundries Inc. Barrier layer conformality in copper interconnects
KR102756671B1 (ko) * 2019-02-21 2025-01-17 삼성디스플레이 주식회사 감광성 수지 조성물, 이를 이용한 표시 장치 및 표시 장치의 제조 방법

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5407529A (en) * 1992-03-04 1995-04-18 Nec Corporation Method for manufacturing semiconductor device
KR100361043B1 (ko) * 1993-12-27 2003-04-10 가와사키 마이크로 엘렉트로닉스 가부시키가이샤 반도체장치의절연막및절연막형성용도포액및절연막의제조방법
US6326318B1 (en) * 1995-09-14 2001-12-04 Sanyo Electric Co., Ltd. Process for producing semiconductor devices including an insulating layer with an impurity
US5989998A (en) * 1996-08-29 1999-11-23 Matsushita Electric Industrial Co., Ltd. Method of forming interlayer insulating film
JP3726226B2 (ja) 1998-02-05 2005-12-14 日本エー・エス・エム株式会社 絶縁膜及びその製造方法
US6054379A (en) * 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US6068884A (en) * 1998-04-28 2000-05-30 Silcon Valley Group Thermal Systems, Llc Method of making low κ dielectric inorganic/organic hybrid films
US6383951B1 (en) * 1998-09-03 2002-05-07 Micron Technology, Inc. Low dielectric constant material for integrated circuit fabrication
US6255232B1 (en) * 1999-02-11 2001-07-03 Taiwan Semiconductor Manufacturing Company Method for forming low dielectric constant spin-on-polymer (SOP) dielectric layer
US6312793B1 (en) * 1999-05-26 2001-11-06 International Business Machines Corporation Multiphase low dielectric constant material
US6225238B1 (en) * 1999-06-07 2001-05-01 Allied Signal Inc Low dielectric constant polyorganosilicon coatings generated from polycarbosilanes
EP1077479A1 (en) * 1999-08-17 2001-02-21 Applied Materials, Inc. Post-deposition treatment to enchance properties of Si-O-C low K film
US6365528B1 (en) * 2000-06-07 2002-04-02 Lsi Logic Corporation Low temperature process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric-material characterized by improved resistance to oxidation and good gap-filling capabilities

Also Published As

Publication number Publication date
US6358838B2 (en) 2002-03-19
JP3615979B2 (ja) 2005-02-02
KR20010076349A (ko) 2001-08-11
JP2001203200A (ja) 2001-07-27
TW513763B (en) 2002-12-11
US20020105085A1 (en) 2002-08-08
US6680541B2 (en) 2004-01-20
US20010009295A1 (en) 2001-07-26

Similar Documents

Publication Publication Date Title
KR100689917B1 (ko) 반도체 장치 및 그 제조 방법
CN1518075B (zh) 有机绝缘膜、其制造方法、使用该有机绝缘膜的半导体器件及其制造方法
KR100751990B1 (ko) 극저 유전 상수를 갖는 박막을 캡핑하는 방법 및 이로부터 제조된 기판
US7088003B2 (en) Structures and methods for integration of ultralow-k dielectrics with improved reliability
US7811926B2 (en) Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics
JP3084367B1 (ja) 層間絶縁膜の形成方法及び半導体装置
US7193325B2 (en) Reliability improvement of SiOC etch with trimethylsilane gas passivation in Cu damascene interconnects
US6566283B1 (en) Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US7888741B2 (en) Structures with improved interfacial strength of SiCOH dielectrics and method for preparing the same
US6207554B1 (en) Gap filling process in integrated circuits using low dielectric constant materials
US20030001240A1 (en) Semiconductor devices containing a discontinuous cap layer and methods for forming same
KR20050013492A (ko) 구리/낮은 k 상호 접속 구조를 위해 개선된 화학적평탄화 성능
US6784485B1 (en) Diffusion barrier layer and semiconductor device containing same
KR20010082057A (ko) 반도체장치 및 그 제조방법
JP2008147644A (ja) ウェットエッチングアンダカットを最小にし且つ超低k(k<2.5)誘電体をポアシーリングする方法
US7105460B2 (en) Nitrogen-free dielectric anti-reflective coating and hardmask
US20050124151A1 (en) Novel method to deposit carbon doped SiO2 films with improved film quality
US20040061236A1 (en) Semiconductor device provided with a dielectric film including porous structure and manufacturing method thereof
JPH11233630A (ja) 半導体装置の製造方法およびこれを用いた半導体装置
US7541296B2 (en) Method for forming insulating film, method for forming multilayer structure and method for manufacturing semiconductor device
JP2004253626A (ja) 多孔性絶縁膜、電子装置及びそれらの製造方法
JP4882893B2 (ja) 半導体装置の製造方法
US7678687B2 (en) Method for manufacturing semiconductor device and semiconductor device

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20130201

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20140204

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20150130

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20160127

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20170227

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20170227