KR100659447B1 - 반도체 칩, 반도체 장치, 반도체 장치의 제조 방법 및전자기기 - Google Patents
반도체 칩, 반도체 장치, 반도체 장치의 제조 방법 및전자기기 Download PDFInfo
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- KR100659447B1 KR100659447B1 KR1020050024407A KR20050024407A KR100659447B1 KR 100659447 B1 KR100659447 B1 KR 100659447B1 KR 1020050024407 A KR1020050024407 A KR 1020050024407A KR 20050024407 A KR20050024407 A KR 20050024407A KR 100659447 B1 KR100659447 B1 KR 100659447B1
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- conductive layer
- semiconductor device
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- E—FIXED CONSTRUCTIONS
- E03—WATER SUPPLY; SEWERAGE
- E03F—SEWERS; CESSPOOLS
- E03F5/00—Sewerage structures
- E03F5/10—Collecting-tanks; Equalising-tanks for regulating the run-off; Laying-up basins
- E03F5/105—Accessories, e.g. flow regulators or cleaning devices
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- C—CHEMISTRY; METALLURGY
- C02—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
- C02F—TREATMENT OF WATER, WASTE WATER, SEWAGE, OR SLUDGE
- C02F3/00—Biological treatment of water, waste water, or sewage
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- H01L2224/29438—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
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- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H01L2224/838—Bonding techniques
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- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H01L2924/3011—Impedance
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Structural Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Water Supply & Treatment (AREA)
- Hydrology & Water Resources (AREA)
- Manufacturing & Machinery (AREA)
- Microbiology (AREA)
- Biodiversity & Conservation Biology (AREA)
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- Civil Engineering (AREA)
- Chemical & Material Sciences (AREA)
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- Health & Medical Sciences (AREA)
- Public Health (AREA)
- Mechanical Engineering (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004091171 | 2004-03-26 | ||
| JPJP-P-2004-00091171 | 2004-03-26 | ||
| JP2004319480A JP2005311293A (ja) | 2004-03-26 | 2004-11-02 | 半導体チップ、半導体装置、半導体装置の製造方法及び電子機器 |
| JPJP-P-2004-00319480 | 2004-11-02 |
Publications (2)
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|---|---|
| KR20060044669A KR20060044669A (ko) | 2006-05-16 |
| KR100659447B1 true KR100659447B1 (ko) | 2006-12-19 |
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| JP (1) | JP2005311293A (enExample) |
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| CN (1) | CN1674242A (enExample) |
| TW (1) | TWI257676B (enExample) |
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|---|---|---|---|---|
| JP2005191541A (ja) * | 2003-12-05 | 2005-07-14 | Seiko Epson Corp | 半導体装置、半導体チップ、半導体装置の製造方法及び電子機器 |
| JP4750586B2 (ja) * | 2006-02-28 | 2011-08-17 | 住友電工デバイス・イノベーション株式会社 | 半導体装置および電子装置並びにその製造方法 |
| JP5520425B2 (ja) * | 2009-01-10 | 2014-06-11 | 宛伶 兪 | 半導体部材のメタルバンプと密封を形成する方法 |
| KR20110052880A (ko) * | 2009-11-13 | 2011-05-19 | 삼성전자주식회사 | 플립 칩 패키지 및 그의 제조 방법 |
| CN103107156B (zh) * | 2011-11-11 | 2016-02-10 | 讯忆科技股份有限公司 | 晶圆焊垫的凸块结构及其制造方法 |
| JP2013140902A (ja) * | 2012-01-06 | 2013-07-18 | Enrei Yu | 半導体パッケージ及びその製造方法 |
| JP6057521B2 (ja) * | 2012-03-05 | 2017-01-11 | デクセリアルズ株式会社 | 異方性導電材料を用いた接続方法及び異方性導電接合体 |
| JP6333624B2 (ja) * | 2013-05-22 | 2018-05-30 | 積水化学工業株式会社 | 接続構造体 |
| US9331033B1 (en) * | 2014-12-23 | 2016-05-03 | Sunasic Technologies Inc. | Method for forming stacked metal contact in electrical communication with aluminum wiring in semiconductor wafer of integrated circuit |
| CN105826206B (zh) * | 2015-01-05 | 2018-07-24 | 旭景科技股份有限公司 | 用于形成堆栈金属接点与半导体晶圆内铝线电连通的方法 |
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| JPS63128734A (ja) * | 1986-11-19 | 1988-06-01 | Seiko Epson Corp | 半導体装置 |
| JP2000286299A (ja) * | 1999-03-30 | 2000-10-13 | Matsushita Electric Ind Co Ltd | 半導体装置の接続方法 |
| JP3348681B2 (ja) * | 1999-04-08 | 2002-11-20 | 日本電気株式会社 | 集積回路の端子構造 |
| JP3968554B2 (ja) * | 2000-05-01 | 2007-08-29 | セイコーエプソン株式会社 | バンプの形成方法及び半導体装置の製造方法 |
| JP2003282616A (ja) * | 2002-03-20 | 2003-10-03 | Seiko Epson Corp | バンプの形成方法及び半導体装置の製造方法 |
| JP2003282615A (ja) * | 2002-03-20 | 2003-10-03 | Seiko Epson Corp | バンプの構造、バンプの形成方法、半導体装置およびその製造方法並びに電子機器 |
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Also Published As
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| CN1674242A (zh) | 2005-09-28 |
| TW200532831A (en) | 2005-10-01 |
| US20050212130A1 (en) | 2005-09-29 |
| KR20060044669A (ko) | 2006-05-16 |
| JP2005311293A (ja) | 2005-11-04 |
| TWI257676B (en) | 2006-07-01 |
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