KR100617621B1 - 반도체 집적회로장치의 제조방법 - Google Patents

반도체 집적회로장치의 제조방법 Download PDF

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KR100617621B1
KR100617621B1 KR1020020039991A KR20020039991A KR100617621B1 KR 100617621 B1 KR100617621 B1 KR 100617621B1 KR 1020020039991 A KR1020020039991 A KR 1020020039991A KR 20020039991 A KR20020039991 A KR 20020039991A KR 100617621 B1 KR100617621 B1 KR 100617621B1
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South Korea
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film
insulating film
temperature
forming
silicon oxide
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English (en)
Korean (ko)
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KR20030014569A (ko
Inventor
후지와라쯔요시
아사카카쯔유키
나리요시야스히로
호시노요시노리
오오모리카즈토시
Original Assignee
가부시키가이샤 히타치세이사쿠쇼
가부시키가이샤 히타치초에루.에스.아이.시스테무즈
히타치 토부 세미콘덕터 가부시키가이샤
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Publication of KR20030014569A publication Critical patent/KR20030014569A/ko
Application granted granted Critical
Publication of KR100617621B1 publication Critical patent/KR100617621B1/ko
Assigned to 르네사스 세미컨덕터 패키지 앤드 테스트 솔루션즈 가부시키가이샤 reassignment 르네사스 세미컨덕터 패키지 앤드 테스트 솔루션즈 가부시키가이샤 권리지분의 전부이전등록 Assignors: 히타치 토부 세미콘덕터 가부시키가이샤
Assigned to 르네사스 일렉트로닉스 가부시키가이샤 reassignment 르네사스 일렉트로닉스 가부시키가이샤 권리지분의 전부이전등록 Assignors: 가부시기가이샤 히다치초엘에스아이시스템즈, 가부시키가이샤 히타치세이사쿠쇼
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/482—Bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/412—Deposition of metallic or metal-silicide materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/098—Manufacture or treatment of dielectric parts thereof by filling between adjacent conductive parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/712—Electrodes having non-planar surfaces, e.g. formed by texturisation being rough surfaces, e.g. using hemispherical grains
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/716—Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions

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  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020020039991A 2001-08-09 2002-07-10 반도체 집적회로장치의 제조방법 Expired - Fee Related KR100617621B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2001-00241793 2001-08-09
JP2001241793A JP4011870B2 (ja) 2001-08-09 2001-08-09 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
KR20030014569A KR20030014569A (ko) 2003-02-19
KR100617621B1 true KR100617621B1 (ko) 2006-09-01

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KR1020020039991A Expired - Fee Related KR100617621B1 (ko) 2001-08-09 2002-07-10 반도체 집적회로장치의 제조방법

Country Status (4)

Country Link
US (2) US6803271B2 (https=)
JP (1) JP4011870B2 (https=)
KR (1) KR100617621B1 (https=)
TW (1) TW569429B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761361B1 (ko) * 2006-05-02 2007-09-27 주식회사 하이닉스반도체 반도체 소자 및 그 제조방법
JP5302522B2 (ja) * 2007-07-02 2013-10-02 スパンション エルエルシー 半導体装置及びその製造方法
US8034691B2 (en) * 2008-08-18 2011-10-11 Macronix International Co., Ltd. HDP-CVD process, filling-in process utilizing HDP-CVD, and HDP-CVD system
KR101676810B1 (ko) 2014-10-30 2016-11-16 삼성전자주식회사 반도체 소자, 이를 포함하는 디스플레이 드라이버 집적 회로 및 디스플레이 장치
GB2614089B (en) 2021-12-21 2024-05-29 Cirrus Logic Int Semiconductor Ltd Current estimation in a power converter

Citations (7)

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KR19980084463A (ko) * 1997-05-23 1998-12-05 김영환 반도체 소자의 제조방법
US5858837A (en) * 1996-11-12 1999-01-12 Nec Corporation Method of manufacturing semiconductor memory device
US5858829A (en) * 1998-06-29 1999-01-12 Vanguard International Semiconductor Corporation Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-spacer bit lines
KR19990006039A (ko) * 1997-06-30 1999-01-25 김영환 반도체 소자의 제조방법
KR19990042091A (ko) * 1997-11-25 1999-06-15 김영환 반도체 장치의 절연막 평탄화 방법
JPH11354750A (ja) * 1998-06-12 1999-12-24 Matsushita Electron Corp 半導体装置及びその製造方法
KR20010009376A (ko) * 1999-07-09 2001-02-05 김영환 반도체장치의 제조방법

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JP2747036B2 (ja) * 1989-07-07 1998-05-06 日本電信電話株式会社 薄膜形成方法
US5654589A (en) * 1995-06-06 1997-08-05 Advanced Micro Devices, Incorporated Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application
JPH09289247A (ja) 1996-04-19 1997-11-04 Sony Corp コンタクト形成方法
US6157083A (en) * 1996-06-03 2000-12-05 Nec Corporation Fluorine doping concentrations in a multi-structure semiconductor device
JP2985789B2 (ja) 1996-08-30 1999-12-06 日本電気株式会社 半導体装置の製造方法
JPH10173049A (ja) 1996-12-11 1998-06-26 Fujitsu Ltd 半導体装置及びその製造方法
JP3109449B2 (ja) * 1997-04-25 2000-11-13 日本電気株式会社 多層配線構造の形成方法
JP3686248B2 (ja) * 1998-01-26 2005-08-24 株式会社日立製作所 半導体集積回路装置およびその製造方法
JPH11243180A (ja) 1998-02-25 1999-09-07 Sony Corp 半導体装置の製造方法
US6165834A (en) * 1998-05-07 2000-12-26 Micron Technology, Inc. Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell
US6150209A (en) * 1999-04-23 2000-11-21 Taiwan Semiconductor Manufacturing Company Leakage current reduction of a tantalum oxide layer via a nitrous oxide high density annealing procedure
KR20010001924A (ko) * 1999-06-09 2001-01-05 김영환 반도체소자의 커패시터 제조방법
JP2001007202A (ja) * 1999-06-22 2001-01-12 Sony Corp 半導体装置の製造方法
US6485988B2 (en) * 1999-12-22 2002-11-26 Texas Instruments Incorporated Hydrogen-free contact etch for ferroelectric capacitor formation

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5858837A (en) * 1996-11-12 1999-01-12 Nec Corporation Method of manufacturing semiconductor memory device
KR19980084463A (ko) * 1997-05-23 1998-12-05 김영환 반도체 소자의 제조방법
KR19990006039A (ko) * 1997-06-30 1999-01-25 김영환 반도체 소자의 제조방법
KR19990042091A (ko) * 1997-11-25 1999-06-15 김영환 반도체 장치의 절연막 평탄화 방법
JPH11354750A (ja) * 1998-06-12 1999-12-24 Matsushita Electron Corp 半導体装置及びその製造方法
US5858829A (en) * 1998-06-29 1999-01-12 Vanguard International Semiconductor Corporation Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-spacer bit lines
KR20010009376A (ko) * 1999-07-09 2001-02-05 김영환 반도체장치의 제조방법

Also Published As

Publication number Publication date
US7084055B2 (en) 2006-08-01
KR20030014569A (ko) 2003-02-19
US6803271B2 (en) 2004-10-12
JP2003060082A (ja) 2003-02-28
US20050026358A1 (en) 2005-02-03
JP4011870B2 (ja) 2007-11-21
US20030032233A1 (en) 2003-02-13
TW569429B (en) 2004-01-01

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