KR100392120B1 - 다결정 실리콘 막의 형성 방법 - Google Patents
다결정 실리콘 막의 형성 방법 Download PDFInfo
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- KR100392120B1 KR100392120B1 KR10-2000-0005956A KR20000005956A KR100392120B1 KR 100392120 B1 KR100392120 B1 KR 100392120B1 KR 20000005956 A KR20000005956 A KR 20000005956A KR 100392120 B1 KR100392120 B1 KR 100392120B1
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- Prior art keywords
- film
- thin film
- cap
- cap film
- forming
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02672—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Optics & Photonics (AREA)
- Recrystallisation Techniques (AREA)
- Catalysts (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (12)
- 절연 표면을 가진 기판상에 비단결정 박막 반도체와 촉매원소를 함유하는 캡막을 순차적으로 형성하는 단계,상기 캡막상에서 엑시머 레이저광을 조사하는 단계, 및상기 캡막을 할로겐을 함유하는 가스에 의한 드라이에칭법, 불소세정, 또는 RCA 세정에 의해 제거함과 아울러 상기 촉매원소를 제거하는 단계를 포함하는 것을 특징으로 하는 반도체 박막 형성 방법.
- 제 1 항에 있어서, 상기 캡막의 상기 형성 단계 후에 상기 촉매 원소가 상기 캡막에 첨가되는 것을 특징으로 하는 반도체 박막 형성 방법.
- 제 1 항에 있어서, 상기 캡막의 상기 형성 단계 도중에 상기 촉매 원소를 상기 캡막에 첨가시키는 것을 특징으로 하는 반도체 박막 형성 방법.
- 제 2 항에 있어서, 상기 촉매 원소가 이온 주입 방법을 사용하여 상기 캡막에 첨가되는 것을 특징으로 하는 반도체 박막 형성 방법.
- 제 3 항에 있어서, 상기 촉매 원소가, 스퍼터링 방법을 사용하여 상기 캡막을 형성할 때, 동시에 상기 캡막에 첨가되는 것을 특징으로 하는 반도체 박막 형성방법.
- 제 3 항에 있어서, 상기 촉매 원소가 고온 와이어 CVD 방법을 사용하여 상기 캡막에 첨가되는 것을 특징으로 하는 반도체 박막 형성 방법.
- 제 1 항에 있어서, 상기 캡막이 10㎚ 이상의 두께를 가지는 것을 특징으로 하는 반도체 박막 형성 방법.
- 삭제
- 삭제
- 제 1 항에 있어서, 상기 촉매 원소가 Ni, Pt, Pd, Co, Fe, Cu, Au, Ag, Cr 및 그 혼합물로 이루어진 그룹에서부터 선택된 것임을 특징으로 하는 반도체 박막 형성 방법.
- 제 1 항에 있어서, 상기 캡막이 실리콘 산화막인 것을 특징으로 하는 반도체 박막 형성 방법.
- 삭제
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP03099699A JP3331999B2 (ja) | 1999-02-09 | 1999-02-09 | 半導体薄膜の製造方法 |
JP99-30996 | 1999-02-09 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20000062534A KR20000062534A (ko) | 2000-10-25 |
KR100392120B1 true KR100392120B1 (ko) | 2003-07-22 |
Family
ID=12319218
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2000-0005956A KR100392120B1 (ko) | 1999-02-09 | 2000-02-09 | 다결정 실리콘 막의 형성 방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US6391747B1 (ko) |
JP (1) | JP3331999B2 (ko) |
KR (1) | KR100392120B1 (ko) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001147446A (ja) * | 1999-11-19 | 2001-05-29 | Hitachi Ltd | 液晶表示装置とその製造方法 |
KR100726129B1 (ko) * | 2000-10-26 | 2007-06-12 | 엘지.필립스 엘시디 주식회사 | 다결정실리콘 박막트랜지스터 소자 및 그 제조방법 |
JP4097059B2 (ja) * | 2001-08-01 | 2008-06-04 | 富士通株式会社 | 磁気記録媒体の製造方法 |
KR20020089959A (ko) * | 2001-05-25 | 2002-11-30 | 엘지.필립스 엘시디 주식회사 | 폴리실리콘 박막트랜지스터의 제조방법 및 이를 적용한액정표시소자 |
KR100425159B1 (ko) * | 2001-05-25 | 2004-03-30 | 엘지.필립스 엘시디 주식회사 | 폴리실리콘 박막트랜지스터의 제조방법 및 이를 적용한액정표시소자 |
KR100439347B1 (ko) * | 2001-07-04 | 2004-07-07 | 주승기 | 실리콘 박막의 결정화 방법 및 이를 이용한 반도체 소자제조 방법 |
KR100761345B1 (ko) * | 2001-08-17 | 2007-09-27 | 엘지.필립스 엘시디 주식회사 | 결정질 실리콘의 제조방법 |
KR100470021B1 (ko) * | 2001-12-28 | 2005-02-04 | 엘지.필립스 엘시디 주식회사 | 실리콘 결정화 방법과 박막트랜지스터 제조방법 |
KR100556346B1 (ko) * | 2001-12-28 | 2006-03-03 | 엘지.필립스 엘시디 주식회사 | 금속 배선 형성방법 |
EP1437683B1 (en) * | 2002-12-27 | 2017-03-08 | Semiconductor Energy Laboratory Co., Ltd. | IC card and booking account system using the IC card |
US7652359B2 (en) * | 2002-12-27 | 2010-01-26 | Semiconductor Energy Laboratory Co., Ltd. | Article having display device |
US7566001B2 (en) * | 2003-08-29 | 2009-07-28 | Semiconductor Energy Laboratory Co., Ltd. | IC card |
KR100666564B1 (ko) * | 2004-08-04 | 2007-01-09 | 삼성에스디아이 주식회사 | 박막트랜지스터의 제조 방법 |
KR100611764B1 (ko) * | 2004-08-20 | 2006-08-10 | 삼성에스디아이 주식회사 | 박막트랜지스터의 제조 방법 |
US7683373B2 (en) | 2004-10-05 | 2010-03-23 | Samsung Mobile Display Co., Ltd. | Thin film transistor and method of fabricating the same |
KR101309111B1 (ko) * | 2006-07-27 | 2013-09-17 | 삼성전자주식회사 | 폴리실리콘 패턴의 형성방법과 폴리실리콘 패턴을 포함한다층 교차점 저항성 메모리 소자 및 그의 제조방법 |
JP2007288159A (ja) * | 2007-03-12 | 2007-11-01 | Trustees Of Columbia Univ In The City Of New York | 逐次的横方向結晶化法による処理中及び処理後のシリコンフィルムの表面平坦化法 |
US7960261B2 (en) | 2007-03-23 | 2011-06-14 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing crystalline semiconductor film and method for manufacturing thin film transistor |
US9177811B2 (en) | 2007-03-23 | 2015-11-03 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
CN103681244B (zh) * | 2013-12-25 | 2016-09-14 | 深圳市华星光电技术有限公司 | 低温多晶硅薄膜的制备方法及其制作系统 |
CN105140114A (zh) * | 2015-09-10 | 2015-12-09 | 深圳市华星光电技术有限公司 | 基板制备方法 |
Citations (1)
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KR950021005A (ko) * | 1993-12-27 | 1995-07-26 | 쯔지 하루오 | 반도체막 및 반도체막을 이용한 반도체장치의 제조방법 |
Family Cites Families (10)
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JPH0521339A (ja) | 1991-07-10 | 1993-01-29 | Ricoh Co Ltd | 薄膜半導体装置とその製法 |
EP0612102B1 (en) * | 1993-02-15 | 2001-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Process for the fabrication of a crystallised semiconductor layer |
JP3359690B2 (ja) | 1993-03-12 | 2002-12-24 | 株式会社半導体エネルギー研究所 | 半導体回路の作製方法 |
TW264575B (ko) * | 1993-10-29 | 1995-12-01 | Handotai Energy Kenkyusho Kk | |
JP2546524B2 (ja) | 1993-12-08 | 1996-10-23 | 日本電気株式会社 | 薄膜トランジスタの製造方法 |
JP3190517B2 (ja) | 1994-05-13 | 2001-07-23 | 株式会社半導体エネルギー研究所 | 半導体の作製方法 |
JPH0869967A (ja) | 1994-08-26 | 1996-03-12 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
JP2776276B2 (ja) | 1994-11-10 | 1998-07-16 | 日本電気株式会社 | 薄膜トランジスタの製造方法 |
JP3765902B2 (ja) | 1997-02-19 | 2006-04-12 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法および電子デバイスの作製方法 |
JPH1167663A (ja) | 1997-08-18 | 1999-03-09 | Fujitsu Ltd | 半導体装置の製造方法 |
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1999
- 1999-02-09 JP JP03099699A patent/JP3331999B2/ja not_active Expired - Fee Related
-
2000
- 2000-02-07 US US09/498,619 patent/US6391747B1/en not_active Expired - Lifetime
- 2000-02-09 KR KR10-2000-0005956A patent/KR100392120B1/ko active IP Right Grant
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR950021005A (ko) * | 1993-12-27 | 1995-07-26 | 쯔지 하루오 | 반도체막 및 반도체막을 이용한 반도체장치의 제조방법 |
Also Published As
Publication number | Publication date |
---|---|
KR20000062534A (ko) | 2000-10-25 |
JP3331999B2 (ja) | 2002-10-07 |
US6391747B1 (en) | 2002-05-21 |
JP2000228360A (ja) | 2000-08-15 |
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