KR100328809B1 - 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치 - Google Patents

웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치 Download PDF

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Publication number
KR100328809B1
KR100328809B1 KR1019990029785A KR19990029785A KR100328809B1 KR 100328809 B1 KR100328809 B1 KR 100328809B1 KR 1019990029785 A KR1019990029785 A KR 1019990029785A KR 19990029785 A KR19990029785 A KR 19990029785A KR 100328809 B1 KR100328809 B1 KR 100328809B1
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KR
South Korea
Prior art keywords
input
pads
data bits
data
cell array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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KR1019990029785A
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English (en)
Korean (ko)
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KR20010010733A (ko
Inventor
김성훈
김철수
Original Assignee
윤종용
삼성전자 주식회사
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Publication date
Application filed by 윤종용, 삼성전자 주식회사 filed Critical 윤종용
Priority to KR1019990029785A priority Critical patent/KR100328809B1/ko
Priority to JP2000211763A priority patent/JP2001057100A/ja
Priority to US09/620,018 priority patent/US6323664B1/en
Publication of KR20010010733A publication Critical patent/KR20010010733A/ko
Application granted granted Critical
Publication of KR100328809B1 publication Critical patent/KR100328809B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Dram (AREA)
KR1019990029785A 1999-07-22 1999-07-22 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치 Expired - Fee Related KR100328809B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019990029785A KR100328809B1 (ko) 1999-07-22 1999-07-22 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치
JP2000211763A JP2001057100A (ja) 1999-07-22 2000-07-12 半導体メモリ装置
US09/620,018 US6323664B1 (en) 1999-07-22 2000-07-20 Semiconductor memory device capable of accurately testing for defective memory cells at a wafer level

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990029785A KR100328809B1 (ko) 1999-07-22 1999-07-22 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치

Publications (2)

Publication Number Publication Date
KR20010010733A KR20010010733A (ko) 2001-02-15
KR100328809B1 true KR100328809B1 (ko) 2002-03-14

Family

ID=19603700

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990029785A Expired - Fee Related KR100328809B1 (ko) 1999-07-22 1999-07-22 웨이퍼 레벨 테스트 기능을 갖는 반도체 메모리 장치

Country Status (3)

Country Link
US (1) US6323664B1 (enExample)
JP (1) JP2001057100A (enExample)
KR (1) KR100328809B1 (enExample)

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US6448796B1 (en) * 2000-06-14 2002-09-10 International Business Machines Corporation Selective netlist to test fine pitch multi-chip semiconductor
US6670633B1 (en) * 2000-12-29 2003-12-30 Intel Corporation System for split package power and rotational burn-in of a microelectronic device
KR100465599B1 (ko) 2001-12-07 2005-01-13 주식회사 하이닉스반도체 데이타 출력 버퍼
WO2004053944A2 (en) * 2002-12-11 2004-06-24 Pdf Solutions, Inc. Fast localization of electrical failures on an integrated circuit system and method
JP4591024B2 (ja) * 2004-10-01 2010-12-01 ソニー株式会社 信号検査回路および半導体記憶装置
KR100630716B1 (ko) * 2004-11-11 2006-10-02 삼성전자주식회사 다양한 패턴 데이터를 쓸 수 있는 반도체 메모리 소자 및그 전기적 검사방법
US7417449B1 (en) * 2005-11-15 2008-08-26 Advanced Micro Devices, Inc. Wafer stage storage structure speed testing
US7405585B2 (en) * 2006-02-14 2008-07-29 Taiwan Semiconductor Manufacturing Co., Ltd. Versatile semiconductor test structure array
KR100899664B1 (ko) * 2007-01-10 2009-05-27 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 테스트 방법
JP5612249B2 (ja) * 2008-01-31 2014-10-22 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体記憶装置
KR20100024588A (ko) 2008-08-26 2010-03-08 삼성전자주식회사 돈 캐어 기능을 갖는 테스트 수행회로를 가지는 반도체 메모리 장치
KR101552939B1 (ko) * 2009-04-02 2015-09-15 삼성전자주식회사 메모리 셀의 테스트를 위한 반도체 장치 및 테스트 방법
KR20120098094A (ko) * 2011-02-28 2012-09-05 에스케이하이닉스 주식회사 반도체 메모리 장치
KR20120113478A (ko) 2011-04-05 2012-10-15 삼성전자주식회사 반도체 메모리 장치의 테스트 방법
JP2013232270A (ja) 2012-04-04 2013-11-14 Ps4 Luxco S A R L 半導体装置及びそのテスト方法
KR101929983B1 (ko) 2012-07-18 2018-12-17 삼성전자주식회사 저항성 메모리 셀을 갖는 반도체 메모리 장치 및 그 테스트 방법
KR20170056109A (ko) 2015-11-13 2017-05-23 삼성전자주식회사 메모리 장치 및 메모리 장치 테스트 시스템
KR102476201B1 (ko) * 2018-07-24 2022-12-12 에스케이하이닉스 주식회사 메모리 장치 및 그의 테스트 회로
KR102386473B1 (ko) * 2020-11-05 2022-04-13 광운대학교 산학협력단 Rf 빔포밍 집적회로의 웨이퍼 레벨 테스트 방법 및 장치
US11742306B2 (en) * 2021-01-07 2023-08-29 Micron Technology, Inc. Layouts for pads and conductive lines of memory devices, and related devices, systems, and methods
US11716073B2 (en) * 2021-04-07 2023-08-01 Mediatek Inc. Chip with pad tracking

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04181595A (ja) * 1990-11-15 1992-06-29 Nec Corp 半導体メモリ
KR970010656B1 (ko) * 1992-09-01 1997-06-30 마쯔시다 덴기 산교 가부시끼가이샤 반도체 테스트 장치, 반도체 테스트 회로칩 및 프로브 카드
US5617531A (en) * 1993-11-02 1997-04-01 Motorola, Inc. Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor
JP2616712B2 (ja) * 1994-09-22 1997-06-04 日本電気株式会社 半導体記憶装置
JP2751857B2 (ja) * 1995-02-28 1998-05-18 日本電気株式会社 半導体装置
JPH10172298A (ja) * 1996-12-05 1998-06-26 Mitsubishi Electric Corp 半導体記憶装置
JPH11260924A (ja) * 1998-03-10 1999-09-24 Mitsubishi Electric Corp 半導体集積回路装置のテスト方法

Also Published As

Publication number Publication date
KR20010010733A (ko) 2001-02-15
US6323664B1 (en) 2001-11-27
JP2001057100A (ja) 2001-02-27

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