KR100240538B1 - 반도체 기억 장치 - Google Patents

반도체 기억 장치 Download PDF

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Publication number
KR100240538B1
KR100240538B1 KR1019970000979A KR19970000979A KR100240538B1 KR 100240538 B1 KR100240538 B1 KR 100240538B1 KR 1019970000979 A KR1019970000979 A KR 1019970000979A KR 19970000979 A KR19970000979 A KR 19970000979A KR 100240538 B1 KR100240538 B1 KR 100240538B1
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KR
South Korea
Prior art keywords
memory array
output signal
line
memory
local
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019970000979A
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English (en)
Korean (ko)
Other versions
KR980011441A (ko
Inventor
가주타미 아리모토
Original Assignee
다니구찌 이찌로오, 기타오카 다카시
미쓰비시덴키 가부시키가이샤
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Publication date
Application filed by 다니구찌 이찌로오, 기타오카 다카시, 미쓰비시덴키 가부시키가이샤 filed Critical 다니구찌 이찌로오, 기타오카 다카시
Publication of KR980011441A publication Critical patent/KR980011441A/ko
Application granted granted Critical
Publication of KR100240538B1 publication Critical patent/KR100240538B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
KR1019970000979A 1996-07-23 1997-01-15 반도체 기억 장치 Expired - Lifetime KR100240538B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8193757A JPH1040682A (ja) 1996-07-23 1996-07-23 半導体記憶装置
JP96-193757 1996-07-23

Publications (2)

Publication Number Publication Date
KR980011441A KR980011441A (ko) 1998-04-30
KR100240538B1 true KR100240538B1 (ko) 2000-01-15

Family

ID=16313313

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970000979A Expired - Lifetime KR100240538B1 (ko) 1996-07-23 1997-01-15 반도체 기억 장치

Country Status (4)

Country Link
US (2) US5781495A (enExample)
JP (1) JPH1040682A (enExample)
KR (1) KR100240538B1 (enExample)
TW (1) TW323366B (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224667B1 (ko) * 1996-12-10 1999-10-15 윤종용 계층적 입출력라인 구조를 갖는 반도체 메모리장치 및 이의 배치방법
US6011710A (en) * 1997-10-30 2000-01-04 Hewlett-Packard Company Capacitance reducing memory system, device and method
KR100281125B1 (ko) * 1998-12-29 2001-03-02 김영환 비휘발성 강유전체 메모리장치
US5892725A (en) * 1998-05-13 1999-04-06 International Business Machines Corporation Memory in a data processing system having uneven cell grouping on bitlines and method therefor
JP2000030447A (ja) * 1998-07-14 2000-01-28 Mitsubishi Electric Corp 半導体記憶装置
US6333866B1 (en) * 1998-09-28 2001-12-25 Texas Instruments Incorporated Semiconductor device array having dense memory cell array and heirarchical bit line scheme
KR100287882B1 (ko) * 1998-11-03 2001-05-02 김영환 비휘발성 강유전체 메모리장치
JP2000150820A (ja) * 1998-11-09 2000-05-30 Mitsubishi Electric Corp 半導体記憶装置
KR100304962B1 (ko) 1998-11-24 2001-10-20 김영환 텅스텐비트라인형성방법
JP2001053243A (ja) * 1999-08-06 2001-02-23 Hitachi Ltd 半導体記憶装置とメモリモジュール
KR100310992B1 (ko) 1999-09-03 2001-10-18 윤종용 멀티 뱅크 메모리 장치 및 입출력 라인 배치방법
DE10004109C2 (de) * 2000-01-31 2001-11-29 Infineon Technologies Ag Speicherbaustein mit geringer Zugriffszeit
KR100326086B1 (ko) * 2000-02-03 2002-03-07 윤종용 반도체 메모리 장치 및 이 장치의 프리차지 방법
KR100364801B1 (ko) * 2000-08-30 2002-12-16 주식회사 하이닉스반도체 반도체 메모리 장치
KR100385956B1 (ko) * 2001-02-14 2003-06-02 삼성전자주식회사 효율적인 칼럼 리던던시 스킴을 갖는 반도체 메모리장치
KR100408421B1 (ko) * 2002-01-16 2003-12-03 삼성전자주식회사 서브-어레이의 개수에 관계없이 계층형 입출력 라인구조를 가지는 반도체 메모리 장치
DE10392539T5 (de) * 2002-04-10 2005-06-02 Hynix Semiconductor Inc., Ichon Speicherchiparchitektur mit nichtrechteckigen Speicherbänken und Verfahren zum Anordnen von Speicherbänken
KR100733406B1 (ko) 2004-05-10 2007-06-29 주식회사 하이닉스반도체 글로벌 데이터 버스를 구비한 반도체 메모리 소자
JP2006216693A (ja) * 2005-02-02 2006-08-17 Toshiba Corp 半導体記憶装置
KR100873623B1 (ko) * 2007-07-10 2008-12-12 주식회사 하이닉스반도체 반도체 메모리 장치
JP2010257552A (ja) * 2009-04-28 2010-11-11 Elpida Memory Inc 半導体記憶装置
KR101060899B1 (ko) * 2009-12-23 2011-08-30 주식회사 하이닉스반도체 반도체 메모리 장치 및 이의 동작 방법
JP5622715B2 (ja) * 2011-12-28 2014-11-12 株式会社東芝 半導体記憶装置
US9286423B2 (en) * 2012-03-30 2016-03-15 International Business Machines Corporation Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
US9230046B2 (en) 2012-03-30 2016-01-05 International Business Machines Corporation Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0492776B1 (en) * 1990-12-25 1998-05-13 Mitsubishi Denki Kabushiki Kaisha A semiconductor memory device with a large storage capacity memory and a fast speed memory
JP3283547B2 (ja) * 1991-08-29 2002-05-20 株式会社日立製作所 半導体メモリ装置
JP3244340B2 (ja) * 1993-05-24 2002-01-07 三菱電機株式会社 同期型半導体記憶装置
US5734620A (en) * 1995-04-05 1998-03-31 Micron Technology, Inc. Hierarchical memory array structure with redundant components having electrically isolated bit lines

Also Published As

Publication number Publication date
US6249474B1 (en) 2001-06-19
US5781495A (en) 1998-07-14
KR980011441A (ko) 1998-04-30
TW323366B (en) 1997-12-21
JPH1040682A (ja) 1998-02-13

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