JPWO2021130600A5 - - Google Patents

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JPWO2021130600A5
JPWO2021130600A5 JP2021566379A JP2021566379A JPWO2021130600A5 JP WO2021130600 A5 JPWO2021130600 A5 JP WO2021130600A5 JP 2021566379 A JP2021566379 A JP 2021566379A JP 2021566379 A JP2021566379 A JP 2021566379A JP WO2021130600 A5 JPWO2021130600 A5 JP WO2021130600A5
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insulator
conductor
oxide
forming
film
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JP2021566379A
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JPWO2021130600A1 (https=
JP7710994B2 (ja
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JP2021566379A 2019-12-27 2020-12-15 半導体装置 Active JP7710994B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2019239444 2019-12-27
JP2019239444 2019-12-27
JP2020005762 2020-01-17
JP2020005762 2020-01-17
PCT/IB2020/061920 WO2021130600A1 (ja) 2019-12-27 2020-12-15 半導体装置、半導体装置の作製方法

Publications (3)

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JPWO2021130600A1 JPWO2021130600A1 (https=) 2021-07-01
JPWO2021130600A5 true JPWO2021130600A5 (https=) 2023-12-20
JP7710994B2 JP7710994B2 (ja) 2025-07-22

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JP2021566379A Active JP7710994B2 (ja) 2019-12-27 2020-12-15 半導体装置

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US (1) US12414284B2 (https=)
JP (1) JP7710994B2 (https=)
KR (1) KR20220120577A (https=)
CN (1) CN114868255A (https=)
WO (1) WO2021130600A1 (https=)

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US12295163B2 (en) 2021-12-16 2025-05-06 Asm Ip Holding B.V. Formation of gate stacks comprising a threshold voltage tuning layer

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CN107947763B (zh) 2010-08-06 2021-12-28 株式会社半导体能源研究所 半导体集成电路
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JPWO2019145807A1 (ja) 2018-01-25 2021-01-14 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
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WO2021070007A1 (ja) 2019-10-11 2021-04-15 株式会社半導体エネルギー研究所 半導体装置
CN114616681A (zh) * 2019-11-01 2022-06-10 株式会社半导体能源研究所 半导体装置

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