JPWO2019156051A1 - 高周波モジュール - Google Patents
高周波モジュール Download PDFInfo
- Publication number
- JPWO2019156051A1 JPWO2019156051A1 JP2019570744A JP2019570744A JPWO2019156051A1 JP WO2019156051 A1 JPWO2019156051 A1 JP WO2019156051A1 JP 2019570744 A JP2019570744 A JP 2019570744A JP 2019570744 A JP2019570744 A JP 2019570744A JP WO2019156051 A1 JPWO2019156051 A1 JP WO2019156051A1
- Authority
- JP
- Japan
- Prior art keywords
- frequency module
- wiring board
- bonding
- resin layer
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229920005989 resin Polymers 0.000 claims description 46
- 239000011347 resin Substances 0.000 claims description 46
- 238000007789 sealing Methods 0.000 claims description 43
- 239000002184 metal Substances 0.000 claims description 25
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 238000007747 plating Methods 0.000 claims description 19
- 238000005452 bending Methods 0.000 abstract 1
- 230000000087 stabilizing effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 38
- 239000000758 substrate Substances 0.000 description 10
- 238000012986 modification Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 8
- 239000000919 ceramic Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 239000002313 adhesive film Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/52—Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
- H01Q1/526—Electromagnetic shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q23/00—Antennas with active circuits or circuit elements integrated within them or attached to them
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/142—HF devices
- H01L2924/1421—RF devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Geometry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
本発明の第1実施形態にかかる高周波モジュール1aについて、図1〜図2を参照して説明する。なお、図1は図2のA−A矢視断面図、図2は高周波モジュール1aのシールド膜6を除いた状態の平面図である。
本発明の第2実施形態にかかる高周波モジュール1bについて、図3〜図4を参照して説明する。なお、図3は高周波モジュール1bの断面図であって、図4のB−B矢視断面図、図4は高周波モジュール1bのシールド膜6を除いた状態の平面図である。
上記した実施形態では、複数の第1突起電極5aおよび複数の第2突起電極5bが、多層配線基板2の上面20aに配置されていたが、図5に示す高周波モジュール1cの突起電極5cのように、突起電極が枠状に形成されていてもよい。この場合、複数の突起電極を形成する必要がないため、製造コストを抑制することができる。
上記した実施形態では、多層配線基板2の上面20aに対して垂直な方向から見たときに、複数のボンディングワイヤー11が部品3aに対して縦方向と横方向に格子状に配置されていたが、図6に示す高周波モジュール1dのように、複数のボンディングワイヤー11aが部品3aに対して斜め方向に略平行に配列されていてもよい。部品3aに対して斜め方向にボンディングワイヤー11aを配置することにより、部品3aに対する縦方向からと横方向からの電磁波を同時に遮断することができる。このため、格子状に配置した場合と比べて少ない本数のボンディングワイヤー11aで、部品3aに対するシールド特性を向上させることができる。
本発明の第3実施形態にかかる高周波モジュール1eについて、図7〜図8を参照して説明する。なお、図7は高周波モジュール1eの断面図であって、図8のC−C矢視断面図、図8は図7のシールド膜6を除いた状態の平面図である。
本発明の第3実施形態にかかる高周波モジュール1fについて、図9〜図10を参照して説明する。なお、図9は高周波モジュール1fの断面図であって、図10のD−D矢視断面図、図10は図9のシールド膜6を除いた状態の平面図である。
2 多層配線基板(配線基板)
3a〜3d 部品
4 封止樹脂層
5a〜5c 突起電極(第1突起電極、第2突起電極)
6 シールド膜
11、11a〜11c ボンディングワイヤー
12a 接合の起点部
12b 接合の終点部
13 シールド部材
本発明の第4実施形態にかかる高周波モジュール1fについて、図9〜図10を参照して説明する。なお、図9は高周波モジュール1fの断面図であって、図10のD−D矢視断面図、図10は図9のシールド膜6を除いた状態の平面図である。
Claims (12)
- 配線基板と、
前記配線基板の一方主面に実装された部品と、
前記配線基板の前記一方主面に形成された第1突起電極と
ボンディングワイヤーにより形成され、前記部品をシールドするシールド部材とを備え、
前記ボンディングワイヤーは、接合の起点部が前記配線基板の前記一方主面に接続され、接合の終点部が前記第1突起電極に接続されている
ことを特徴とする高周波モジュール。 - 前記第1突起電極が金属めっきにより形成されていることを特徴とする請求項1に記載の高周波モジュール。
- 前記第1突起電極が金属ブロックにより形成されていることを特徴とする請求項1に記載の高周波モジュール。
- 前記配線基板の前記一方主面に形成された第2突起電極をさらに備え、
前記起点部が前記第2突起電極に接続されていることを特徴とする請求項1ないし3のいずれか1項に記載の高周波モジュール。 - 前記第2突起電極が金属めっきにより形成されていることを特徴とする請求項4に記載の高周波モジュール。
- 前記第2突起電極が金属ブロックにより形成されていることを特徴とする請求項4に記載の高周波モジュール。
- 前記部品を封止する封止樹脂層と
前記封止樹脂層の表面に設けられたシールド膜とをさらに備え、
前記封止樹脂層は、前記配線基板の前記一方主面に当接する当接面と、該当接面に対向する対向面と、前記当接面と前記対向面の端縁同士を繋ぐ側面とを有し、
前記シールド膜は、少なくとも前記封止樹脂層の前記対向面と前記側面とを被覆し、
前記封止樹脂層の前記対向面において、前記ボンディングワイヤーが前記シールド膜と接していることを特徴とする請求項1ないし6のいずれか1項に記載の高周波モジュール。 - 前記シールド部材は、複数の前記ボンディングワイヤーにより形成され、
前記複数のボンディングワイヤーが、それぞれ前記部品を跨ぐように配置されていることを特徴とする請求項1ないし7のいずれか1項に記載の高周波モジュール。 - 前記シールド部材は、複数の前記ボンディングワイヤーにより形成され、
前記複数のボンディングワイヤーが、前記部品を囲むように前記部品の周囲に沿って配置されていることを特徴とする請求項1ないし7のいずれか1項に記載の高周波モジュール。 - 前記配線基板の前記一方主面に対して垂直な方向から見たときに、
前記複数のボンディングワイヤーのうち一部のボンディングワイヤーは、それぞれ略平行に配置され、
前記複数のボンディングワイヤーのうち残りのボンディングワイヤーは、前記一部のボンディングワイヤーと交差するようにそれぞれ略平行に配置される
ことを特徴とする請求項8に記載の高周波モジュール。 - 前記配線基板の前記一方主面に対して垂直な方向から見たときに、
前記部品は矩形状を有し、
前記複数のボンディングワイヤーは、前記部品の一辺に対して斜め方向にそれぞれ略平行に配置されることを特徴とする請求項8に記載の高周波モジュール。 - 配線基板と、
前記配線基板の一方主面に実装された部品と、
前記配線基板の前記一方主面に形成された複数の第1突起電極と、
複数のボンディングワイヤーにより形成され、前記部品をシールドするシールド部材と、
前記部品を封止する封止樹脂層と、
前記封止樹脂層の表面に設けられたシールド膜とを備え、
前記封止樹脂層は、前記配線基板の前記一方主面に当接する当接面と、該当接面に対向する対向面と、前記当接面と前記対向面の端縁同士を繋ぐ側面とを有し、
前記シールド膜は、少なくとも前記封止樹脂層の前記対向面と前記側面とを被覆し、
前記ボンディングワイヤーは、一端が前記第1突起電極に接続され、他端が前記封止樹脂層の前記対向面から露出して前記シールド膜と接続している
ことを特徴とする高周波モジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018020691 | 2018-02-08 | ||
JP2018020691 | 2018-02-08 | ||
PCT/JP2019/003966 WO2019156051A1 (ja) | 2018-02-08 | 2019-02-05 | 高周波モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2019156051A1 true JPWO2019156051A1 (ja) | 2021-01-07 |
JP6950757B2 JP6950757B2 (ja) | 2021-10-13 |
Family
ID=67549384
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019570744A Active JP6950757B2 (ja) | 2018-02-08 | 2019-02-05 | 高周波モジュール |
Country Status (4)
Country | Link |
---|---|
US (1) | US11476172B2 (ja) |
JP (1) | JP6950757B2 (ja) |
CN (1) | CN111699552B (ja) |
WO (1) | WO2019156051A1 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11239178B2 (en) * | 2018-11-29 | 2022-02-01 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structures and methods of manufacturing the same |
WO2021039325A1 (ja) * | 2019-08-23 | 2021-03-04 | 株式会社村田製作所 | モジュール |
CN114521290A (zh) * | 2019-09-27 | 2022-05-20 | 株式会社村田制作所 | 模块 |
US11450618B2 (en) | 2020-01-17 | 2022-09-20 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of compartment shielding using bond wires |
JP7282048B2 (ja) * | 2020-02-12 | 2023-05-26 | 三菱電機株式会社 | 電力用半導体装置およびその製造方法 |
CN219085958U (zh) * | 2020-06-11 | 2023-05-26 | 株式会社村田制作所 | 模块 |
WO2021256300A1 (ja) * | 2020-06-16 | 2021-12-23 | 株式会社村田製作所 | モジュール |
US12055633B2 (en) * | 2020-08-25 | 2024-08-06 | Lumentum Operations Llc | Package for a time of flight device |
WO2022044504A1 (ja) * | 2020-08-31 | 2022-03-03 | 株式会社村田製作所 | 回路モジュール及びサブモジュールの製造方法 |
CN114256211B (zh) * | 2020-09-25 | 2022-10-18 | 荣耀终端有限公司 | 封装体及其制备方法、终端和电子设备 |
WO2022085686A1 (ja) * | 2020-10-22 | 2022-04-28 | 株式会社村田製作所 | 回路モジュール |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001044305A (ja) * | 1999-07-29 | 2001-02-16 | Mitsui High Tec Inc | 半導体装置 |
JP2005050868A (ja) * | 2003-07-29 | 2005-02-24 | Kyocera Corp | 電子装置 |
US20050040501A1 (en) * | 2003-08-20 | 2005-02-24 | Hagen Deborah A. | Wirebonded assemblage method and apparatus |
JP2005347489A (ja) * | 2004-06-02 | 2005-12-15 | Fujitsu Ltd | 半導体装置 |
US8012868B1 (en) * | 2008-12-15 | 2011-09-06 | Amkor Technology Inc | Semiconductor device having EMI shielding and method therefor |
US20120061816A1 (en) * | 2010-09-10 | 2012-03-15 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
WO2016117196A1 (ja) * | 2015-01-21 | 2016-07-28 | 株式会社村田製作所 | 電力増幅モジュール |
US20170236785A1 (en) * | 2015-12-19 | 2017-08-17 | Skyworks Solutions, Inc. | Shielded lead frame packages |
US20170263568A1 (en) * | 2016-03-10 | 2017-09-14 | Amkor Technology, Inc. | Semiconductor device having conductive wire with increased attachment angle and method |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3012868A (en) | 1957-12-16 | 1961-12-12 | Dow Chemical Co | Enhanced organic explosives |
JP3238326B2 (ja) * | 1996-07-17 | 2001-12-10 | 株式会社東芝 | 発光装置 |
JP2002359445A (ja) * | 2001-03-22 | 2002-12-13 | Matsushita Electric Ind Co Ltd | レーザー加工用の誘電体基板およびその加工方法ならび半導体パッケージおよびその製作方法 |
JP3838571B2 (ja) * | 2003-08-14 | 2006-10-25 | 松下電器産業株式会社 | 固体撮像装置の製造方法 |
JP2007258670A (ja) * | 2006-02-24 | 2007-10-04 | Yamaha Corp | 半導体装置 |
JP2009033114A (ja) * | 2007-06-29 | 2009-02-12 | Tdk Corp | 電子モジュール、及び電子モジュールの製造方法 |
CN102105981B (zh) | 2008-07-31 | 2013-11-13 | 斯盖沃克斯解决方案公司 | 集成的干扰屏蔽体的半导体封装体及其制造方法 |
JP2010258295A (ja) * | 2009-04-27 | 2010-11-11 | Sharp Corp | 高周波モジュール、その製造方法、および電子機器 |
JP5327299B2 (ja) * | 2011-09-09 | 2013-10-30 | オムロン株式会社 | 半導体装置及びマイクロフォン |
KR101835483B1 (ko) * | 2011-12-09 | 2018-03-08 | 삼성전자주식회사 | 멀티-칩 패키지 및 그의 제조 방법 |
JP6488985B2 (ja) * | 2015-10-26 | 2019-03-27 | 株式会社村田製作所 | 高周波モジュール |
US10134686B2 (en) * | 2016-09-30 | 2018-11-20 | Avago Technologies International Sales Pte. Limited | Systems and methods for providing electromagnetic interference (EMI) compartment shielding for components disposed inside of system electronic packages |
CN219085958U (zh) * | 2020-06-11 | 2023-05-26 | 株式会社村田制作所 | 模块 |
-
2019
- 2019-02-05 JP JP2019570744A patent/JP6950757B2/ja active Active
- 2019-02-05 WO PCT/JP2019/003966 patent/WO2019156051A1/ja active Application Filing
- 2019-02-05 CN CN201980012421.7A patent/CN111699552B/zh active Active
-
2020
- 2020-08-05 US US16/985,411 patent/US11476172B2/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001044305A (ja) * | 1999-07-29 | 2001-02-16 | Mitsui High Tec Inc | 半導体装置 |
JP2005050868A (ja) * | 2003-07-29 | 2005-02-24 | Kyocera Corp | 電子装置 |
US20050040501A1 (en) * | 2003-08-20 | 2005-02-24 | Hagen Deborah A. | Wirebonded assemblage method and apparatus |
JP2005347489A (ja) * | 2004-06-02 | 2005-12-15 | Fujitsu Ltd | 半導体装置 |
US8012868B1 (en) * | 2008-12-15 | 2011-09-06 | Amkor Technology Inc | Semiconductor device having EMI shielding and method therefor |
US20120061816A1 (en) * | 2010-09-10 | 2012-03-15 | Samsung Electronics Co., Ltd. | Semiconductor package and method of fabricating the same |
WO2016117196A1 (ja) * | 2015-01-21 | 2016-07-28 | 株式会社村田製作所 | 電力増幅モジュール |
US20170236785A1 (en) * | 2015-12-19 | 2017-08-17 | Skyworks Solutions, Inc. | Shielded lead frame packages |
US20170263568A1 (en) * | 2016-03-10 | 2017-09-14 | Amkor Technology, Inc. | Semiconductor device having conductive wire with increased attachment angle and method |
Also Published As
Publication number | Publication date |
---|---|
US20200365476A1 (en) | 2020-11-19 |
CN111699552A (zh) | 2020-09-22 |
WO2019156051A1 (ja) | 2019-08-15 |
CN111699552B (zh) | 2023-08-15 |
US11476172B2 (en) | 2022-10-18 |
JP6950757B2 (ja) | 2021-10-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6950757B2 (ja) | 高周波モジュール | |
JP6753514B2 (ja) | 高周波モジュール | |
JP6806166B2 (ja) | 高周波モジュール | |
JP6837432B2 (ja) | 高周波モジュール | |
KR100627099B1 (ko) | 적층형 반도체 장치 | |
JP4650244B2 (ja) | 回路モジュールおよびその製造方法 | |
JP4186843B2 (ja) | 立体的電子回路装置 | |
WO2019098316A1 (ja) | 高周波モジュール | |
US10674648B2 (en) | High-frequency module | |
JP2022037035A (ja) | 高周波モジュール | |
JP7143896B2 (ja) | モジュール | |
JP2018201248A (ja) | 無線モジュール | |
JP7010372B2 (ja) | 高周波モジュール | |
KR102117477B1 (ko) | 반도체 패키지 및 반도체 패키지의 제조방법 | |
KR101741648B1 (ko) | 전자파 차폐 수단을 갖는 반도체 패키지 및 그 제조 방법 | |
WO2018101383A1 (ja) | 高周波モジュール | |
JP7131624B2 (ja) | モジュール | |
CN107710901B (zh) | 高频模块及其制造方法 | |
JP2013110299A (ja) | 複合モジュール | |
JP2630294B2 (ja) | 混成集積回路装置およびその製造方法 | |
JP2008124273A (ja) | シールド構造基板とその製造方法 | |
JP2018137353A (ja) | 電子素子実装用基板、電子装置および電子モジュール | |
JP2007201289A (ja) | 電子部品収納用パッケージ及び電子部品装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200623 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200623 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210302 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210406 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20210824 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20210906 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6950757 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |