JPWO2013115052A1 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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Abstract
Description
3 ゲート電極
4 ゲート絶縁層
4a 下層ゲート絶縁層
4b 上層ゲート絶縁層
5 酸化物半導体層
6s ソース電極
6d ドレイン電極
7 第1透明電極
8 層間絶縁層
8a 誘電体層
8b 絶縁保護層
9 第2透明電極
50 液晶層
100A 半導体装置(TFT基板)
200 対向基板
500 液晶表示装置
Claims (16)
- 基板と、
前記基板の上に形成されたゲート電極と、
前記ゲート電極の上に形成されたゲート絶縁層と、
前記ゲート絶縁層の上に形成された酸化物半導体層と、
前記酸化物半導体層に電気的に接続されたソース電極およびドレイン電極と、
前記ドレイン電極と電気的に接続された第1透明電極と、
前記ソース電極および前記ドレイン電極の上に形成された誘電体層を含む層間絶縁層と、
前記層間絶縁層の上に形成された第2透明電極とを有し、
前記第2透明電極の少なくとも一部は、前記誘電体層を介して前記第1透明電極と重なっており、
前記酸化物半導体層および前記第1透明電極は、同一の酸化物膜から形成されている、半導体装置。 - 前記第1透明電極の上に前記ドレイン電極が形成され、
前記第1透明電極は前記ドレイン電極に直接接している、請求項1に記載の半導体装置。 - 前記ソース電極および前記ドレイン電極の上に形成された絶縁保護層をさらに有し、
前記絶縁保護層は、前記酸化物半導体層のチャネル領域と接するように形成されており、
前記絶縁保護層は酸化物から形成されている、請求項1または2に記載の半導体装置。 - 前記ゲート絶縁層および前記誘電体層の少なくとも1つは、酸化物絶縁層を含み、
前記酸化物絶縁層は、前記酸化物半導体層と接している、請求項1から3のいずれかに記載の半導体装置。 - 前記酸化物膜は、In、GaおよびZnを含む、請求項1から4のいずれかに記載の半導体装置。
- 前記第1透明電極は、前記酸化物半導体層よりも高い濃度で不純物を含み、
前記層間絶縁層のうち前記第1透明電極上に位置する部分は、他の部分よりも高い濃度で不純物を含んでいる、請求項1から5のいずれかに記載の半導体装置。 - 基板を用意する工程(a)と、
基板上にゲート電極およびゲート絶縁層を形成する工程(b)と、
前記ゲート絶縁層の上に酸化物半導体膜を形成する工程(c)と、
前記酸化物半導体膜の上にソース電極およびドレイン電極を形成する工程(d)と、
前記酸化物半導体膜のチャネル領域を保護する保護層を形成した後、前記酸化物半導体膜の一部を低抵抗化させる低抵抗化処理を行って第1透明電極を形成し、前記酸化物半導体膜のうち前記第1透明電極が形成されなかった部分が酸化物半導体層となる工程(e)と、
前記ソース電極および前記ドレイン電極の上に誘電体層を形成する工程(f)と、
前記誘電体層の上に第2透明電極を形成する工程(g)とを包含し、
前記第2透明電極の少なくとも一部は前記誘電体層を介して前記第1透明電極と重なる、半導体装置の製造方法。 - 前記工程(e)は、前記工程(d)と前記工程(f)との間に行われる、請求項7に記載の半導体装置の製造方法。
- 前記工程(e)は、前記工程(f)と前記工程(g)との間に行われる、請求項7に記載の半導体装置の製造方法。
- 前記工程(e)は、前記誘電体層越しに、前記酸化物半導体膜の一部に不純物を注入して前記第1透明電極を形成する工程を含む、請求項9に記載の半導体装置の製造方法。
- 前記工程(e)は、前記工程(g)の後に行われる、請求項7に記載の半導体装置の製造方法。
- 前記工程(e)は、前記誘電体層および前記第2透明電極越しに、前記酸化物半導体膜の一部に不純物を注入して前記第1透明電極を形成する工程を含む、請求項11に記載の半導体装置の製造方法。
- 前記保護層は、酸化物絶縁層である、請求項8に記載の半導体装置の製造方法。
- 前記基板の法線方向から見たとき、前記保護層の端部は前記ドレイン電極と重なる、請求項7から13のいずれかに記載の半導体装置の製造方法。
- 前記酸化物半導体層はIn−Ga−Zn−O系の半導体を含む請求項1から6のいずれかに記載の半導体装置。
- 前記酸化物半導体膜はIn−Ga−Zn−O系の半導体を含む請求項7から14のいずれかに記載の半導体装置の製造方法。
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