JPS6343775B2 - - Google Patents

Info

Publication number
JPS6343775B2
JPS6343775B2 JP55080196A JP8019680A JPS6343775B2 JP S6343775 B2 JPS6343775 B2 JP S6343775B2 JP 55080196 A JP55080196 A JP 55080196A JP 8019680 A JP8019680 A JP 8019680A JP S6343775 B2 JPS6343775 B2 JP S6343775B2
Authority
JP
Japan
Prior art keywords
common memory
circuit
processor
parity check
parity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55080196A
Other languages
English (en)
Japanese (ja)
Other versions
JPS576956A (en
Inventor
Akira Ikuta
Masato Suyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP8019680A priority Critical patent/JPS576956A/ja
Publication of JPS576956A publication Critical patent/JPS576956A/ja
Publication of JPS6343775B2 publication Critical patent/JPS6343775B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
JP8019680A 1980-06-16 1980-06-16 Information processor Granted JPS576956A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8019680A JPS576956A (en) 1980-06-16 1980-06-16 Information processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8019680A JPS576956A (en) 1980-06-16 1980-06-16 Information processor

Publications (2)

Publication Number Publication Date
JPS576956A JPS576956A (en) 1982-01-13
JPS6343775B2 true JPS6343775B2 (enrdf_load_stackoverflow) 1988-09-01

Family

ID=13711623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8019680A Granted JPS576956A (en) 1980-06-16 1980-06-16 Information processor

Country Status (1)

Country Link
JP (1) JPS576956A (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63178397A (ja) * 1987-01-20 1988-07-22 能美防災株式会社 防災設備の故障監視装置
JPS63251841A (ja) * 1987-04-08 1988-10-19 Seiko Epson Corp マルチプロセツサの異常検出制御方法
JPS63251840A (ja) * 1987-04-08 1988-10-19 Seiko Epson Corp マルチプロセツサの異常検出制御方法
JP5526626B2 (ja) 2009-06-30 2014-06-18 富士通株式会社 演算処理装置およびアドレス変換方法
JP5337661B2 (ja) * 2009-10-09 2013-11-06 株式会社日立製作所 メモリ制御装置及びメモリ制御装置の制御方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5336080B2 (enrdf_load_stackoverflow) * 1973-08-01 1978-09-30
JPS53104138A (en) * 1977-02-23 1978-09-11 Toshiba Corp Minicomputer composite system

Also Published As

Publication number Publication date
JPS576956A (en) 1982-01-13

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