JPS62219954A - 三次元ｉｃの製造方法 - Google Patents

三次元ｉｃの製造方法

Info

Publication number
JPS62219954A
JPS62219954A JP61062981A JP6298186A JPS62219954A JP S62219954 A JPS62219954 A JP S62219954A JP 61062981 A JP61062981 A JP 61062981A JP 6298186 A JP6298186 A JP 6298186A JP S62219954 A JPS62219954 A JP S62219954A
Authority
JP
Japan
Prior art keywords
conductive material
dimensional
post
chips
posts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61062981A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0374508B2 (https=
Inventor
Takashi Kato
隆 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61062981A priority Critical patent/JPS62219954A/ja
Priority to KR1019870002514A priority patent/KR900008647B1/ko
Priority to DE8787104091T priority patent/DE3778944D1/de
Priority to EP87104091A priority patent/EP0238089B1/en
Publication of JPS62219954A publication Critical patent/JPS62219954A/ja
Priority to US07/325,122 priority patent/US4939568A/en
Publication of JPH0374508B2 publication Critical patent/JPH0374508B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/284—Configurations of stacked chips characterised by structural arrangements for measuring or testing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP61062981A 1986-03-20 1986-03-20 三次元ｉｃの製造方法 Granted JPS62219954A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP61062981A JPS62219954A (ja) 1986-03-20 1986-03-20 三次元ｉｃの製造方法
KR1019870002514A KR900008647B1 (ko) 1986-03-20 1987-03-19 3차원 집적회로와 그의 제조방법
DE8787104091T DE3778944D1 (de) 1986-03-20 1987-03-20 Dreidimensionale integrierte schaltung und deren herstellungsverfahren.
EP87104091A EP0238089B1 (en) 1986-03-20 1987-03-20 Three-dimensional integrated circuit and manufacturing method therefor
US07/325,122 US4939568A (en) 1986-03-20 1989-03-17 Three-dimensional integrated circuit and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61062981A JPS62219954A (ja) 1986-03-20 1986-03-20 三次元ｉｃの製造方法

Publications (2)

Publication Number Publication Date
JPS62219954A true JPS62219954A (ja) 1987-09-28
JPH0374508B2 JPH0374508B2 (https=) 1991-11-27

Family

ID=13216045

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61062981A Granted JPS62219954A (ja) 1986-03-20 1986-03-20 三次元ｉｃの製造方法

Country Status (1)

Country Link
JP (1) JPS62219954A (https=)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129441A (ja) * 1987-11-16 1989-05-22 Nissan Motor Co Ltd 半導体装置
JPH01189141A (ja) * 1988-01-25 1989-07-28 Nec Corp 半導体装置
WO1999044236A1 (fr) * 1998-02-27 1999-09-02 Seiko Epson Corporation Procede servant a fabriquer un composant tridimensionnel
WO1999045593A1 (fr) * 1998-03-02 1999-09-10 Seiko Epson Corporation Dispositif tridimensionnel
US6639303B2 (en) 1996-10-29 2003-10-28 Tru-Si Technolgies, Inc. Integrated circuits and methods for their fabrication
JP2004014706A (ja) * 2002-06-05 2004-01-15 Tokyo Seimitsu Co Ltd 基板加工方法および基板加工装置
US6882030B2 (en) 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
US6953748B2 (en) 2003-07-31 2005-10-11 Seiko Epson Corporation Method of manufacturing semiconductor device
JP2006135305A (ja) * 2004-10-05 2006-05-25 Semiconductor Energy Lab Co Ltd 半導体装置、半導体装置の作製方法、及び半導体装置の検査方法
JP2010016392A (ja) * 2001-10-01 2010-01-21 Xsil Technology Ltd 基板、特に半導体ウェハの加工
JP2010506406A (ja) * 2006-10-06 2010-02-25 ブルーワー サイエンス アイ エヌ シー． スライディング手法を用いるウェーハの仮接合のための、高温およびスピンオン接合用組成物
JP2011523203A (ja) * 2008-05-06 2011-08-04 ガウサム ヴィスワナダム， 相互接続を伴うウェハレベルインテグレーションモジュール
CN112470293A (zh) * 2018-06-14 2021-03-09 艾利迪公司 光电设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607149A (ja) * 1983-06-24 1985-01-14 Nec Corp 半導体装置の製造方法
JPS6098654A (ja) * 1983-11-02 1985-06-01 Nec Corp 半導体装置の製造方法
JPS60235446A (ja) * 1984-05-09 1985-11-22 Nec Corp 半導体装置とその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS607149A (ja) * 1983-06-24 1985-01-14 Nec Corp 半導体装置の製造方法
JPS6098654A (ja) * 1983-11-02 1985-06-01 Nec Corp 半導体装置の製造方法
JPS60235446A (ja) * 1984-05-09 1985-11-22 Nec Corp 半導体装置とその製造方法

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129441A (ja) * 1987-11-16 1989-05-22 Nissan Motor Co Ltd 半導体装置
JPH01189141A (ja) * 1988-01-25 1989-07-28 Nec Corp 半導体装置
US6882030B2 (en) 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
US6639303B2 (en) 1996-10-29 2003-10-28 Tru-Si Technolgies, Inc. Integrated circuits and methods for their fabrication
EP0986104A4 (en) * 1998-02-27 2003-07-30 Seiko Epson Corp MANUFACTURING METHOD FOR A THREE-DIMENSIONAL COMPONENT
WO1999044236A1 (fr) * 1998-02-27 1999-09-02 Seiko Epson Corporation Procede servant a fabriquer un composant tridimensionnel
KR100484959B1 (ko) * 1998-02-27 2005-04-25 세이코 엡슨 가부시키가이샤 3차원 디바이스의 제조 방법
KR100529842B1 (ko) * 1998-03-02 2005-11-22 세이코 엡슨 가부시키가이샤 3차원 디바이스 및 그 제조 방법
US6846703B2 (en) 1998-03-02 2005-01-25 Seiko Epson Corporation Three-dimensional device
WO1999045593A1 (fr) * 1998-03-02 1999-09-10 Seiko Epson Corporation Dispositif tridimensionnel
JP2010016392A (ja) * 2001-10-01 2010-01-21 Xsil Technology Ltd 基板、特に半導体ウェハの加工
JP2004014706A (ja) * 2002-06-05 2004-01-15 Tokyo Seimitsu Co Ltd 基板加工方法および基板加工装置
US6953748B2 (en) 2003-07-31 2005-10-11 Seiko Epson Corporation Method of manufacturing semiconductor device
JP2006135305A (ja) * 2004-10-05 2006-05-25 Semiconductor Energy Lab Co Ltd 半導体装置、半導体装置の作製方法、及び半導体装置の検査方法
JP2010506406A (ja) * 2006-10-06 2010-02-25 ブルーワー サイエンス アイ エヌ シー． スライディング手法を用いるウェーハの仮接合のための、高温およびスピンオン接合用組成物
JP2011523203A (ja) * 2008-05-06 2011-08-04 ガウサム ヴィスワナダム， 相互接続を伴うウェハレベルインテグレーションモジュール
CN112470293A (zh) * 2018-06-14 2021-03-09 艾利迪公司 光电设备
CN112470293B (zh) * 2018-06-14 2024-05-03 艾利迪公司 光电设备

Also Published As

Publication number Publication date
JPH0374508B2 (https=) 1991-11-27

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