JPS6155300B2 - - Google Patents

Info

Publication number
JPS6155300B2
JPS6155300B2 JP56123431A JP12343181A JPS6155300B2 JP S6155300 B2 JPS6155300 B2 JP S6155300B2 JP 56123431 A JP56123431 A JP 56123431A JP 12343181 A JP12343181 A JP 12343181A JP S6155300 B2 JPS6155300 B2 JP S6155300B2
Authority
JP
Japan
Prior art keywords
control signal
gate
tristate
delay means
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56123431A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5824925A (ja
Inventor
Katsuhiko Shioya
Seiichi Inamasu
Tetsuhiko Ifuku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56123431A priority Critical patent/JPS5824925A/ja
Publication of JPS5824925A publication Critical patent/JPS5824925A/ja
Publication of JPS6155300B2 publication Critical patent/JPS6155300B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Bidirectional Digital Transmission (AREA)
JP56123431A 1981-08-06 1981-08-06 双方向性バスの制御方式 Granted JPS5824925A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56123431A JPS5824925A (ja) 1981-08-06 1981-08-06 双方向性バスの制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56123431A JPS5824925A (ja) 1981-08-06 1981-08-06 双方向性バスの制御方式

Publications (2)

Publication Number Publication Date
JPS5824925A JPS5824925A (ja) 1983-02-15
JPS6155300B2 true JPS6155300B2 (enrdf_load_stackoverflow) 1986-11-27

Family

ID=14860391

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56123431A Granted JPS5824925A (ja) 1981-08-06 1981-08-06 双方向性バスの制御方式

Country Status (1)

Country Link
JP (1) JPS5824925A (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60116252A (ja) * 1983-11-28 1985-06-22 Canon Inc デ−タ通信装置
JP2513273B2 (ja) * 1988-05-31 1996-07-03 日本電気株式会社 多重化ハイウェイバスにおけるデジタル信号送信回路
JP2655585B2 (ja) * 1991-02-20 1997-09-24 シャープ株式会社 半導体集積回路のデータバス制御回路
JP5035349B2 (ja) 2007-09-14 2012-09-26 富士通株式会社 回路、その制御方法
JP5195075B2 (ja) * 2008-06-26 2013-05-08 富士通株式会社 双方向バス制御回路
US9210015B2 (en) * 2014-03-20 2015-12-08 Infineon Technologies Ag Edge-based communication
US9509444B2 (en) 2014-03-20 2016-11-29 Infineon Technologies Ag Efficient checksum communication between devices
US9762419B2 (en) 2014-08-13 2017-09-12 Infineon Technologies Ag Edge-based communication with a plurality of slave devices

Also Published As

Publication number Publication date
JPS5824925A (ja) 1983-02-15

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