JPS6153867B2 - - Google Patents
Info
- Publication number
- JPS6153867B2 JPS6153867B2 JP56151986A JP15198681A JPS6153867B2 JP S6153867 B2 JPS6153867 B2 JP S6153867B2 JP 56151986 A JP56151986 A JP 56151986A JP 15198681 A JP15198681 A JP 15198681A JP S6153867 B2 JPS6153867 B2 JP S6153867B2
- Authority
- JP
- Japan
- Prior art keywords
- emitter
- film
- region
- polycrystalline silicon
- opening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/30—Devices controlled by electric currents or voltages
- H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H10D48/34—Bipolar devices
- H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56151986A JPS5870570A (ja) | 1981-09-28 | 1981-09-28 | 半導体装置の製造方法 |
EP82305024A EP0076106B1 (en) | 1981-09-28 | 1982-09-23 | Method for producing a bipolar transistor |
DE8282305024T DE3276978D1 (en) | 1981-09-28 | 1982-09-23 | Method for producing a bipolar transistor |
US06/425,648 US4408387A (en) | 1981-09-28 | 1982-09-28 | Method for producing a bipolar transistor utilizing an oxidized semiconductor masking layer in conjunction with an anti-oxidation mask |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56151986A JPS5870570A (ja) | 1981-09-28 | 1981-09-28 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5870570A JPS5870570A (ja) | 1983-04-27 |
JPS6153867B2 true JPS6153867B2 (en:Method) | 1986-11-19 |
Family
ID=15530556
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56151986A Granted JPS5870570A (ja) | 1981-09-28 | 1981-09-28 | 半導体装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4408387A (en:Method) |
EP (1) | EP0076106B1 (en:Method) |
JP (1) | JPS5870570A (en:Method) |
DE (1) | DE3276978D1 (en:Method) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5975659A (ja) * | 1982-10-22 | 1984-04-28 | Fujitsu Ltd | 半導体装置の製造方法 |
US4498227A (en) * | 1983-07-05 | 1985-02-12 | Fairchild Camera & Instrument Corporation | Wafer fabrication by implanting through protective layer |
JPS6045052A (ja) * | 1983-08-22 | 1985-03-11 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US4566176A (en) * | 1984-05-23 | 1986-01-28 | U.S. Philips Corporation | Method of manufacturing transistors |
JPS6146063A (ja) * | 1984-08-10 | 1986-03-06 | Hitachi Ltd | 半導体装置の製造方法 |
US4721682A (en) * | 1985-09-25 | 1988-01-26 | Monolithic Memories, Inc. | Isolation and substrate connection for a bipolar integrated circuit |
NL8600769A (nl) * | 1986-03-26 | 1987-10-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
JPS63107167A (ja) * | 1986-10-24 | 1988-05-12 | Oki Electric Ind Co Ltd | 半導体集積回路装置の製造方法 |
US4855798A (en) * | 1986-12-19 | 1989-08-08 | Texas Instruments Incorporated | Semiconductor and process of fabrication thereof |
US5270252A (en) * | 1988-10-25 | 1993-12-14 | United States Of America As Represented By The Secretary Of The Navy | Method of forming platinum and platinum silicide schottky contacts on beta-silicon carbide |
JP2871530B2 (ja) * | 1995-05-10 | 1999-03-17 | 日本電気株式会社 | 半導体装置の製造方法 |
US5702959A (en) * | 1995-05-31 | 1997-12-30 | Texas Instruments Incorporated | Method for making an isolated vertical transistor |
US5872052A (en) | 1996-02-12 | 1999-02-16 | Micron Technology, Inc. | Planarization using plasma oxidized amorphous silicon |
KR100275962B1 (ko) | 1998-12-30 | 2001-02-01 | 김영환 | 반도체장치 및 그의 제조방법_ |
US20060054183A1 (en) * | 2004-08-27 | 2006-03-16 | Thomas Nowak | Method to reduce plasma damage during cleaning of semiconductor wafer processing chamber |
US20060090773A1 (en) * | 2004-11-04 | 2006-05-04 | Applied Materials, Inc. | Sulfur hexafluoride remote plasma source clean |
US8338906B2 (en) * | 2008-01-30 | 2012-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Schottky device |
USD848384S1 (en) * | 2017-08-17 | 2019-05-14 | Epistar Corporation | Transistor |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3507716A (en) * | 1966-09-02 | 1970-04-21 | Hitachi Ltd | Method of manufacturing semiconductor device |
US3710204A (en) * | 1967-05-20 | 1973-01-09 | Telefunken Patent | A semiconductor device having a screen electrode of intrinsic semiconductor material |
US3909925A (en) * | 1974-05-06 | 1975-10-07 | Telex Computer Products | N-Channel charge coupled device fabrication process |
DE2605641C3 (de) * | 1976-02-12 | 1979-12-20 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Hochfrequenztransistor und Verfahren zu seiner Herstellung |
US4060427A (en) * | 1976-04-05 | 1977-11-29 | Ibm Corporation | Method of forming an integrated circuit region through the combination of ion implantation and diffusion steps |
JPS53132275A (en) * | 1977-04-25 | 1978-11-17 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its production |
US4266985A (en) * | 1979-05-18 | 1981-05-12 | Fujitsu Limited | Process for producing a semiconductor device including an ion implantation step in combination with direct thermal nitridation of the silicon substrate |
US4376664A (en) * | 1979-05-31 | 1983-03-15 | Fujitsu Limited | Method of producing a semiconductor device |
US4242791A (en) * | 1979-09-21 | 1981-01-06 | International Business Machines Corporation | High performance bipolar transistors fabricated by post emitter base implantation process |
US4318751A (en) * | 1980-03-13 | 1982-03-09 | International Business Machines Corporation | Self-aligned process for providing an improved high performance bipolar transistor |
-
1981
- 1981-09-28 JP JP56151986A patent/JPS5870570A/ja active Granted
-
1982
- 1982-09-23 EP EP82305024A patent/EP0076106B1/en not_active Expired
- 1982-09-23 DE DE8282305024T patent/DE3276978D1/de not_active Expired
- 1982-09-28 US US06/425,648 patent/US4408387A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPS5870570A (ja) | 1983-04-27 |
DE3276978D1 (en) | 1987-09-17 |
EP0076106A3 (en) | 1985-01-23 |
EP0076106A2 (en) | 1983-04-06 |
US4408387A (en) | 1983-10-11 |
EP0076106B1 (en) | 1987-08-12 |
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