JPS6146751U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6146751U
JPS6146751U JP13254684U JP13254684U JPS6146751U JP S6146751 U JPS6146751 U JP S6146751U JP 13254684 U JP13254684 U JP 13254684U JP 13254684 U JP13254684 U JP 13254684U JP S6146751 U JPS6146751 U JP S6146751U
Authority
JP
Japan
Prior art keywords
gui
pad
semiconductor equipment
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13254684U
Other languages
English (en)
Inventor
健二 森実
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP13254684U priority Critical patent/JPS6146751U/ja
Publication of JPS6146751U publication Critical patent/JPS6146751U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】 第１図゜は本考案半導体装置の一実施例を示す断面図、
第２図、第３図、第４図及び第５図は夫々第１図の製造
工程の例を示す線図、第６図及び第７図は夫々従来の半
導体装置の例を示す線図である。 １ばグイパッド、２はグイ、３はリード、４は裏打ち用
樹脂板、５はワイヤ、８及び９は夫々グイパッド支持部
、１３は封止樹脂である。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体素子が保持−されたグイパッドを支持するグイパ
    ッド支持部が、封止樹脂により完全に覆われた樹脂封止
    形の半導体装置において、リードフレームに裏打ちされ
    た樹脂板によってグイパッドが固定されていることを特
    徴とする半導体装置。
JP13254684U 1984-08-31 1984-08-31 半導体装置 Pending JPS6146751U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13254684U JPS6146751U (ja) 1984-08-31 1984-08-31 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13254684U JPS6146751U (ja) 1984-08-31 1984-08-31 半導体装置

Publications (1)

Publication Number Publication Date
JPS6146751U true JPS6146751U (ja) 1986-03-28

Family

ID=30691108

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13254684U Pending JPS6146751U (ja) 1984-08-31 1984-08-31 半導体装置

Country Status (1)

Country Link
JP (1) JPS6146751U (ja)

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