JPS6123657B2 - - Google Patents
Info
- Publication number
- JPS6123657B2 JPS6123657B2 JP52158556A JP15855677A JPS6123657B2 JP S6123657 B2 JPS6123657 B2 JP S6123657B2 JP 52158556 A JP52158556 A JP 52158556A JP 15855677 A JP15855677 A JP 15855677A JP S6123657 B2 JPS6123657 B2 JP S6123657B2
- Authority
- JP
- Japan
- Prior art keywords
- groove
- window
- mask
- corrosion
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10W10/00—
-
- H10W10/01—
-
- H10W10/0124—
-
- H10W10/0126—
-
- H10W10/021—
-
- H10W10/13—
-
- H10W10/20—
Landscapes
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
- Weting (AREA)
- Bipolar Transistors (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US75472376A | 1976-12-27 | 1976-12-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5383585A JPS5383585A (en) | 1978-07-24 |
| JPS6123657B2 true JPS6123657B2 (index.php) | 1986-06-06 |
Family
ID=25036034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15855677A Granted JPS5383585A (en) | 1976-12-27 | 1977-12-27 | Semiconductor structure and method of producing same |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4155783A (index.php) |
| JP (1) | JPS5383585A (index.php) |
| CA (1) | CA1090006A (index.php) |
| DE (1) | DE2758283C2 (index.php) |
| FR (1) | FR2375720A1 (index.php) |
| GB (1) | GB1548778A (index.php) |
| IT (1) | IT1090820B (index.php) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6327188U (index.php) * | 1986-08-05 | 1988-02-23 |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5572052A (en) * | 1978-11-27 | 1980-05-30 | Fujitsu Ltd | Preparation of semiconductor device |
| US4677456A (en) * | 1979-05-25 | 1987-06-30 | Raytheon Company | Semiconductor structure and manufacturing method |
| US4289550A (en) * | 1979-05-25 | 1981-09-15 | Raytheon Company | Method of forming closely spaced device regions utilizing selective etching and diffusion |
| US4255212A (en) * | 1979-07-02 | 1981-03-10 | The Regents Of The University Of California | Method of fabricating photovoltaic cells |
| GB2115609B (en) * | 1982-02-25 | 1986-04-30 | Raytheon Co | Semiconductor structure manufacturing method |
| JPH073858B2 (ja) * | 1984-04-11 | 1995-01-18 | 株式会社日立製作所 | 半導体装置の製造方法 |
| US4824795A (en) * | 1985-12-19 | 1989-04-25 | Siliconix Incorporated | Method for obtaining regions of dielectrically isolated single crystal silicon |
| US5399901A (en) * | 1994-04-20 | 1995-03-21 | General Instrument Corp. | Semiconductor devices having a mesa structure and method of fabrication for improved surface voltage breakdown characteristics |
| US6822332B2 (en) * | 2002-09-23 | 2004-11-23 | International Business Machines Corporation | Fine line circuitization |
| TWI404136B (zh) * | 2010-04-13 | 2013-08-01 | Univ Nat Taipei Technology | 製作底切蝕刻微結構的製程方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3716425A (en) * | 1970-08-24 | 1973-02-13 | Motorola Inc | Method of making semiconductor devices through overlapping diffusions |
| US3801390A (en) * | 1970-12-28 | 1974-04-02 | Bell Telephone Labor Inc | Preparation of high resolution shadow masks |
| US3725160A (en) * | 1970-12-30 | 1973-04-03 | Texas Instruments Inc | High density integrated circuits |
| US3748187A (en) * | 1971-08-03 | 1973-07-24 | Hughes Aircraft Co | Self-registered doped layer for preventing field inversion in mis circuits |
| US3796612A (en) * | 1971-08-05 | 1974-03-12 | Scient Micro Syst Inc | Semiconductor isolation method utilizing anisotropic etching and differential thermal oxidation |
| JPS4984380A (index.php) * | 1972-12-19 | 1974-08-13 | ||
| US4047195A (en) * | 1973-11-12 | 1977-09-06 | Scientific Micro Systems, Inc. | Semiconductor structure |
| US3986200A (en) * | 1974-01-02 | 1976-10-12 | Signetics Corporation | Semiconductor structure and method |
| US3901737A (en) * | 1974-02-15 | 1975-08-26 | Signetics Corp | Method for forming a semiconductor structure having islands isolated by moats |
| US3920482A (en) * | 1974-03-13 | 1975-11-18 | Signetics Corp | Method for forming a semiconductor structure having islands isolated by adjacent moats |
| JPS5289484A (en) * | 1975-04-25 | 1977-07-27 | Toyo Dengu Seisakushiyo Kk | Semiconductor ic device |
| US3966514A (en) * | 1975-06-30 | 1976-06-29 | Ibm Corporation | Method for forming dielectric isolation combining dielectric deposition and thermal oxidation |
| US3961999A (en) * | 1975-06-30 | 1976-06-08 | Ibm Corporation | Method for forming recessed dielectric isolation with a minimized "bird's beak" problem |
| DE2529598C3 (de) * | 1975-07-02 | 1978-05-24 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Herstellung einer monolithisch integrierten Halbleiterschaltung mit bipolaren Transistoren |
| JPS5244173A (en) * | 1975-10-06 | 1977-04-06 | Hitachi Ltd | Method of flat etching of silicon substrate |
| US4066473A (en) * | 1976-07-15 | 1978-01-03 | Fairchild Camera And Instrument Corporation | Method of fabricating high-gain transistors |
-
1977
- 1977-12-02 CA CA292,266A patent/CA1090006A/en not_active Expired
- 1977-12-12 GB GB51660/77A patent/GB1548778A/en not_active Expired
- 1977-12-16 IT IT52255/77A patent/IT1090820B/it active
- 1977-12-27 FR FR7739314A patent/FR2375720A1/fr active Granted
- 1977-12-27 JP JP15855677A patent/JPS5383585A/ja active Granted
- 1977-12-27 DE DE2758283A patent/DE2758283C2/de not_active Expired
-
1978
- 1978-05-08 US US05/903,433 patent/US4155783A/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6327188U (index.php) * | 1986-08-05 | 1988-02-23 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2758283C2 (de) | 1986-06-12 |
| FR2375720B1 (index.php) | 1982-07-30 |
| US4155783A (en) | 1979-05-22 |
| DE2758283A1 (de) | 1978-07-06 |
| CA1090006A (en) | 1980-11-18 |
| JPS5383585A (en) | 1978-07-24 |
| GB1548778A (en) | 1979-07-18 |
| FR2375720A1 (fr) | 1978-07-21 |
| IT1090820B (it) | 1985-06-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0113517B1 (en) | Method for forming an isolation region | |
| JPS6226590B2 (index.php) | ||
| JPS63234534A (ja) | 半導体素子の製造方法 | |
| JPH0620079B2 (ja) | 高融点金属シリサイド層を形成する方法 | |
| US4187125A (en) | Method for manufacturing semiconductor structures by anisotropic and isotropic etching | |
| EP0178000B1 (en) | Method of forming submicron grooves in, for example, semiconductor material and devices obtained by means of this method | |
| JPH0521338B2 (index.php) | ||
| EP0421507B1 (en) | Method of manufacturing a bipolar transistor | |
| JPH01274470A (ja) | バイポーラ・トランジスタ装置及びその製造方法 | |
| JPS6123657B2 (index.php) | ||
| US4497108A (en) | Method for manufacturing semiconductor device by controlling thickness of insulating film at peripheral portion of element formation region | |
| JP2501806B2 (ja) | 壁スペ−サを有するバイポ−ラ半導体装置の製造方法 | |
| JPS63257231A (ja) | 半導体装置の製造方法 | |
| KR910000020B1 (ko) | 반도체장치의 제조방법 | |
| JPH08125010A (ja) | 半導体装置の隔離構造とその製造方法 | |
| RU1830156C (ru) | Способ изготовлени полупроводниковых приборов | |
| US5763316A (en) | Substrate isolation process to minimize junction leakage | |
| JPH0763072B2 (ja) | 半導体デバイスの分離方法 | |
| JPS62232142A (ja) | 半酸化物分離デバイスを製作するための方法 | |
| US4546537A (en) | Method for producing a semiconductor device utilizing V-groove etching and thermal oxidation | |
| JPS5856436A (ja) | 半導体装置の製造方法 | |
| JPH0313745B2 (index.php) | ||
| JPS60258964A (ja) | 半導体装置の製造方法 | |
| JP2883242B2 (ja) | 半導体装置の製造方法 | |
| JPH06244415A (ja) | 半導体装置およびその製造方法 |