JPS61149341U - - Google Patents
Info
- Publication number
- JPS61149341U JPS61149341U JP3191285U JP3191285U JPS61149341U JP S61149341 U JPS61149341 U JP S61149341U JP 3191285 U JP3191285 U JP 3191285U JP 3191285 U JP3191285 U JP 3191285U JP S61149341 U JPS61149341 U JP S61149341U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- sealing
- pattern
- circuit pattern
- sealing metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 1
Description
第１図はこの考案の一実施例を示す斜視図、第
２図は第１図の部分断面図、第３図は従来装置の
一例を示す斜視図、第４図は第３図の断面図であ
る。
図において、１はセラミツク基板、２は回路パ
ターン、３はセラミツクパツケージ、４は接着剤
、５は内部電極、６はリード、７はワイヤ、８は
接着メタル、９はメタルカバー、１０は半田、１
１はパターン電極、１２はスルーホールである。
なお、図中同一符号は同一または相当部分を示す
。
Fig. 1 is a perspective view showing an embodiment of this invention, Fig. 2 is a partial sectional view of Fig. 1, Fig. 3 is a perspective view showing an example of a conventional device, and Fig. 4 is a sectional view of Fig. 3. It is. In the figure, 1 is a ceramic substrate, 2 is a circuit pattern, 3 is a ceramic package, 4 is an adhesive, 5 is an internal electrode, 6 is a lead, 7 is a wire, 8 is an adhesive metal, 9 is a metal cover, 10 is solder, 1
1 is a pattern electrode, and 12 is a through hole.
Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
成され、他方の面にはスルーホールにより前記一
方の面の回路パターンと接続されているパターン
電極が形成されたセラミツク基板と、前記パター
ン電極にろう付されたリードと、前記セラミツク
基板を覆うカバーとで構成され、前記セラミツク
基板の一方の面の封着用メタルに前記カバーを半
田付して封止してあることを特徴とする密封型混
成集積回路装置。 A ceramic substrate has a circuit pattern and sealing metal formed on one side, a pattern electrode connected to the circuit pattern on the one side through a through hole on the other side, and a ceramic substrate that is brazed to the pattern electrode. and a cover covering the ceramic substrate, the cover being soldered to a sealing metal on one side of the ceramic substrate for sealing. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3191285U JPS61149341U (en) | 1985-03-06 | 1985-03-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3191285U JPS61149341U (en) | 1985-03-06 | 1985-03-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61149341U true JPS61149341U (en) | 1986-09-16 |
Family
ID=30532946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3191285U Pending JPS61149341U (en) | 1985-03-06 | 1985-03-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61149341U (en) |
-
1985
- 1985-03-06 JP JP3191285U patent/JPS61149341U/ja active Pending
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