JPS61157332U - - Google Patents
Info
- Publication number
- JPS61157332U JPS61157332U JP4023385U JP4023385U JPS61157332U JP S61157332 U JPS61157332 U JP S61157332U JP 4023385 U JP4023385 U JP 4023385U JP 4023385 U JP4023385 U JP 4023385U JP S61157332 U JPS61157332 U JP S61157332U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- cover
- pattern
- insulating glass
- sealing metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Description
第1図はこの考案の一実施例を示す斜視図、第
2図は第1図に示すものの要部断面図、第3図は
従来の装置の一例を示す斜視図、第4図は第3図
に示すものの要部断面図である。
図において、1はパツケージ、2はパターン電
極、3はリード、4は封着用メタル、5はカバー
、6は半田、7はセラミツク基板、8は回路パタ
ーン、9は接着剤、10はワイヤ、11は絶縁ガ
ラスである。なお、図中同一符号は同一または相
当部分を示す。
Fig. 1 is a perspective view showing an embodiment of this invention, Fig. 2 is a cross-sectional view of the main part of the device shown in Fig. 1, Fig. 3 is a perspective view showing an example of a conventional device, and Fig. 4 is a perspective view showing an example of the conventional device. FIG. 2 is a cross-sectional view of a main part of what is shown in the figure. In the figure, 1 is a package, 2 is a pattern electrode, 3 is a lead, 4 is a sealing metal, 5 is a cover, 6 is solder, 7 is a ceramic substrate, 8 is a circuit pattern, 9 is an adhesive, 10 is a wire, 11 is insulating glass. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
周部に沿つて並べられ、前記回路パターンと接続
されているパターン電極を有するセラミツク基板
と、前記パターン電極にろう付されたリードと、
前記セラミツク基板の前記一方の面のパターン電
極を除く全面を覆うカバーとで構成され、前記セ
ラミツク基板の前記カバーが当接する部分に絶縁
ガラスを設け、この絶縁ガラスに重ねて封着用メ
タルを形成し、この封着用メタルに前記カバーを
半田付して封止してあることを特徴とする密封型
混成集積回路装置。 a ceramic substrate having a circuit pattern on one surface, pattern electrodes arranged along the outer periphery of the one surface and connected to the circuit pattern, and a lead brazed to the pattern electrode;
a cover that covers the entire surface of the one surface of the ceramic substrate except for the patterned electrodes, an insulating glass is provided at a portion of the ceramic substrate that the cover comes into contact with, and a sealing metal is formed over the insulating glass. . A sealed hybrid integrated circuit device, characterized in that the cover is soldered to the sealing metal and sealed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4023385U JPS61157332U (en) | 1985-03-20 | 1985-03-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4023385U JPS61157332U (en) | 1985-03-20 | 1985-03-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61157332U true JPS61157332U (en) | 1986-09-30 |
Family
ID=30548934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4023385U Pending JPS61157332U (en) | 1985-03-20 | 1985-03-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61157332U (en) |
-
1985
- 1985-03-20 JP JP4023385U patent/JPS61157332U/ja active Pending