JPS61129376U - - Google Patents
Info
- Publication number
- JPS61129376U JPS61129376U JP1332685U JP1332685U JPS61129376U JP S61129376 U JPS61129376 U JP S61129376U JP 1332685 U JP1332685 U JP 1332685U JP 1332685 U JP1332685 U JP 1332685U JP S61129376 U JPS61129376 U JP S61129376U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- thick film
- integrated circuit
- hybrid integrated
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Description
第１図ａ，ｂは本考案による厚膜混成集積回路
基板の概略図および断面図、第２図ａ，ｂ、第３
図ａ，ｂは応用例の概略図および断面図、第４図
ａ，ｂは従来の厚膜混成集積回路基板の概略図お
よび断面図である。
第１図から第４図において図中の番号は以下の
ものを示している。１…セラミツク、ガラスエポ
キシ等からなる基板、２…Ａｇ―Ｐｄ導体ペース
ト、銅薄膜等からなる導電体電極、３…外部取り
付けリード端子、４…導体保護絶縁膜、５…中間
絶縁層膜。
1a and 1b are schematic diagrams and cross-sectional views of a thick film hybrid integrated circuit board according to the present invention;
4A and 4B are a schematic diagram and a sectional view of an application example, and FIGS. 4A and 4B are a schematic diagram and a sectional diagram of a conventional thick film hybrid integrated circuit board. In FIGS. 1 to 4, the numbers in the figures indicate the following. 1... Substrate made of ceramic, glass epoxy, etc., 2... Conductor electrode made of Ag--Pd conductor paste, copper thin film, etc., 3... Externally attached lead terminal, 4... Conductor protective insulating film, 5... Intermediate insulating layer film.
Claims (1)
電極部において、電極間にソルダーダムを一層ま
たは多層の絶縁層により形成したことを特徴とす
る厚膜混成集積回路基板。 1. A thick film hybrid integrated circuit board, characterized in that a solder dam is formed between the electrodes using one or multiple insulating layers in an electrode part for attaching an external lead terminal of the thick film printed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1332685U JPS61129376U (en) | 1985-02-01 | 1985-02-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1332685U JPS61129376U (en) | 1985-02-01 | 1985-02-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61129376U true JPS61129376U (en) | 1986-08-13 |
Family
ID=30497231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1332685U Pending JPS61129376U (en) | 1985-02-01 | 1985-02-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61129376U (en) |
-
1985
- 1985-02-01 JP JP1332685U patent/JPS61129376U/ja active Pending
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