JPS6282763U - - Google Patents

Info

Publication number
JPS6282763U
JPS6282763U JP17436385U JP17436385U JPS6282763U JP S6282763 U JPS6282763 U JP S6282763U JP 17436385 U JP17436385 U JP 17436385U JP 17436385 U JP17436385 U JP 17436385U JP S6282763 U JPS6282763 U JP S6282763U
Authority
JP
Japan
Prior art keywords
conductive path
metal substrate
insulating layer
integrated circuit
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17436385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17436385U priority Critical patent/JPS6282763U/ja
Publication of JPS6282763U publication Critical patent/JPS6282763U/ja
Pending legal-status Critical Current

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  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の実施例を示す断面図、第２図
は従来例を示す断面図である。 １……金属基板、２……酸化アルミニウム膜、
３……絶縁薄層、４……導電路、５……凹部、６
……鍍金層。 FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 1...Metal substrate, 2...Aluminum oxide film,
3... Insulating thin layer, 4... Conductive path, 5... Recess, 6
...Plating layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 金属基板と、該金属基板上に設けた絶縁薄層と
、該絶縁薄層上に形成した導電路と、該導電路上
に設けられた少なくとも１個の半導体素子とを具
備して成る混成集積回路に於いて、前記導電路と
隣接した位置に前記金属基板を露出させて設けた
凹部と、該凹部と前記導電路とを接続する鍍金属
とを有することを特徴とした混成集積回路。 A hybrid integrated circuit comprising a metal substrate, a thin insulating layer provided on the metal substrate, a conductive path formed on the thin insulating layer, and at least one semiconductor element provided on the conductive path. A hybrid integrated circuit comprising: a recess provided in an exposed manner in the metal substrate adjacent to the conductive path; and a plated metal connecting the recess and the conductive path.
JP17436385U 1985-11-13 1985-11-13 Pending JPS6282763U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17436385U JPS6282763U (en) 1985-11-13 1985-11-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17436385U JPS6282763U (en) 1985-11-13 1985-11-13

Publications (1)

Publication Number Publication Date
JPS6282763U true JPS6282763U (en) 1987-05-27

Family

ID=31112674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17436385U Pending JPS6282763U (en) 1985-11-13 1985-11-13

Country Status (1)

Country Link
JP (1) JPS6282763U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5741674B2 (en) * 1978-03-03 1982-09-04
JPS5943595A (en) * 1982-09-02 1984-03-10 株式会社東芝 Metal core printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5741674B2 (en) * 1978-03-03 1982-09-04
JPS5943595A (en) * 1982-09-02 1984-03-10 株式会社東芝 Metal core printed circuit board

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